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CDC351IDBRG4

CDC351IDBRG4

CDC351IDBRG4

Texas Instruments

1 Circuit 100MHz 3.3V Clock Buffer DUAL 24 Pins SSOP

SOT-23

CDC351IDBRG4 Datasheet

non-compliant

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Specifications
Name Value
Type Parameter
Contact Plating Gold
Mount Surface Mount
Package / Case SSOP
Number of Pins 24
Weight 172.39345mg
Packaging Tape & Reel (TR)
JESD-609 Code e4
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 24
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Subcategory Clock Drivers
Technology BICMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Frequency 100MHz
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Pin Count 24
Number of Outputs 10
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Temperature Grade INDUSTRIAL
Number of Circuits 1
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Nominal Supply Current 25mA
Propagation Delay 6.6 ns
Quiescent Current 25mA
Frequency (Max) 100MHz
Family 351
Output Characteristics 3-STATE
Input LVTTL
Logic IC Type LOW SKEW CLOCK DRIVER
Max I(ol) 0.032 A
Prop. Delay@Nom-Sup 4.2 ns
Same Edge Skew-Max (tskwd) 0.9 ns
Length 8.2mm
Height Seated (Max) 2mm
Width 5.3mm
RoHS Status RoHS Compliant
Lead Free Lead Free
CDC351IDBRG4 Product Details

CDC351IDBRG4 Overview


There is a case available for the cut smart buffer in SSOP. This package is packaged in the form of a Tape & Reel (TR). For normal operation, 100MHz is the maximum value. It has 24 terminations in it, which means that it is terminated. Supply voltages of 3.3V are capable of achieving high efficiency. It has been positioned in the way of Surface Mount. There are 24 pins on the clock buffer. During operation, 24 pins are used. I have enclosed this circuit clock in Clock Drivers for your convenience. The clock switch operates at a minimum working temperature of -40°C in order to maintain reliability. It is possible to achieve stable operation by setting the maximum operating temperature to 85°C. A member of the 351 family, this clock buffer is a digital camera. The circuit uses a logic IC with a value of LOW SKEW CLOCK DRIVER as the input. As a default, it is set to output 10. A maximum supply voltage of 3.6VV can be applied to it. Depending on the type of source voltage, it can run with a voltage as low as 3V. When the supply voltage is at 3.3V, the efficiency will be highest. The clock divider consumes 25mA quiescent current, and it is unaffected by external factors. As long as the frequency is set to 100MHz, excellent accuracy can be maintained.

CDC351IDBRG4 Features


24 terminations
Clock Drivers subcategory
logic IC type of LOW SKEW CLOCK DRIVER
at 100MHz frequency


CDC351IDBRG4 Applications


There are a lot of Texas Instruments
CDC351IDBRG4 Clock Buffers & Drivers applications.


  • Clock signal format conversion
  • Clock signal level shifting
  • High performance communication system
  • Data center
  • Cloud computing
  • Network
  • High speed industry
  • High-end consumer electronics
  • Data communication
  • Telecommunications

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