MSP430F2122IRHBR Description
The MSP430 has a von-Neumann common memory address bus (MAB) and memory data bus for interconnecting its 16-bit RISC CPU, peripherals, and flexible clock system (MDB). The MSP430 provides solutions for difficult mixed-signal applications by coupling a contemporary CPU with modular memory-mapped analog and digital peripherals.
MSP430F2122IRHBR Features
0.1 μA RAM retention
0.8 μA real-time clock mode
250 μA/MIPS active
Large register file eliminates working file bottleneck
Compact core design reduces power consumption and cost
Optimized for modern high-level programming
Only 27 core instructions and seven addressing modes
Extensive vectored-interrupt capability
MSP430F2122IRHBR Applications
Power Management
Consumer Electronics
Portable Devices
Industrial