1.65V~3.6V 150MHz 16 Bit D-Type Flip Flop DUAL 74ALVCH16374 48 Pins 74ALVCH Series 48-TFSOP (0.173, 4.40mm Width)
SOT-23
SN74ALVCH16374DGVR Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
6 Weeks
Lifecycle Status
ACTIVE (Last Updated: 5 days ago)
Contact Plating
Gold
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
48-TFSOP (0.173, 4.40mm Width)
Number of Pins
48
Weight
123.490523mg
Operating Temperature
-40°C~85°C TA
Packaging
Tape & Reel (TR)
Series
74ALVCH
JESD-609 Code
e4
Pbfree Code
yes
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
48
ECCN Code
EAR99
Type
D-Type
Subcategory
Bus Driver/Transceiver
Packing Method
TR
Technology
CMOS
Voltage - Supply
1.65V~3.6V
Terminal Position
DUAL
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
260
Supply Voltage
1.8V
Terminal Pitch
0.4mm
[email protected] Reflow Temperature-Max (s)
NOT SPECIFIED
Base Part Number
74ALVCH16374
Function
Standard
Qualification Status
Not Qualified
Output Type
Tri-State, Non-Inverted
Number of Elements
2
Polarity
Non-Inverting
Supply Voltage-Min (Vsup)
1.65V
Load Capacitance
50pF
Number of Ports
2
Output Current
24mA
Number of Bits
16
Clock Frequency
150MHz
Propagation Delay
4.9 ns
Quiescent Current
40μA
Turn On Delay Time
1 ns
Family
ALVC/VCX/A
Logic Function
D-Type, Flip-Flop
Current - Output High, Low
24mA 24mA
Number of Bits per Element
8
Max Propagation Delay @ V, Max CL
4.2ns @ 3.3V, 50pF
Trigger Type
Positive Edge
Input Capacitance
3pF
Power Supply Current-Max (ICC)
0.04mA
Number of Output Lines
3
Count Direction
UNIDIRECTIONAL
Clock Edge Trigger Type
Positive Edge
Translation
N/A
Max [email protected]
150000000Hz
Height
1.2mm
Length
9.7mm
Width
4.4mm
Thickness
1.05mm
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
Pricing & Ordering
Quantity
Unit Price
Ext. Price
SN74ALVCH16374DGVR Product Details
SN74ALVCH16374DGVR Overview
48-TFSOP (0.173, 4.40mm Width)is the packaging method. You can find it in the Tape & Reel (TR)package. The output it is configured with uses Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. It is mounted in the way of Surface Mount. A 1.65V~3.6Vsupply voltage is required for it to operate. A temperature of -40°C~85°C TAis considered to be the operating temperature. There is D-Type type of electronic flip flop associated with this device. JK flip flop is a part of the 74ALVCHseries of FPGAs. In order for it to function properly, its output frequency should not exceed 150MHz. The list contains 2 elements. A total of 48 terminations have been made. The 74ALVCH16374 family contains it. The D flip flop is powered by a voltage of 1.8V . The input capacitance of this T flip flop is 3pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. Electronic devices of this type belong to the ALVC/VCX/Afamily. Surface Mount mounts this electronic component. With its 48pins, it is designed to work with most electronic flip flops. In this device, the clock edge trigger type is Positive Edge. This part is included in Bus Driver/Transceiver. It is designed with a number of bits of 16. Normally, the supply voltage (Vsup) should be above 1.65V. As a result of its reliable performance, this T flip flop is suitable for TR. The D flip flop has no ports embedded. Its output current of 24mAallows for maximum design flexibility. It operates with 3 output lines. It consumes 40μA of quiescent current without being affected by external factors.