1.65V~3.6V 250MHz 18 Bit D-Type Flip Flop DUAL 74ALVCH16823 56 Pins 40μA 74ALVCH Series 56-TFSOP (0.173, 4.40mm Width)
SOT-23
SN74ALVCH16823DGVR Datasheet
non-compliant
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Specifications
Name
Value
Type
Parameter
Lifecycle Status
ACTIVE (Last Updated: 4 days ago)
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
56-TFSOP (0.173, 4.40mm Width)
Number of Pins
56
Weight
145.007811mg
Operating Temperature
-40°C~85°C TA
Packaging
Cut Tape (CT)
Series
74ALVCH
JESD-609 Code
e4
Pbfree Code
yes
Part Status
Discontinued
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
56
Type
D-Type
Terminal Finish
Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory
FF/Latches
Packing Method
TR
Technology
CMOS
Voltage - Supply
1.65V~3.6V
Terminal Position
DUAL
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
260
Supply Voltage
1.8V
Terminal Pitch
0.4mm
[email protected] Reflow Temperature-Max (s)
NOT SPECIFIED
Base Part Number
74ALVCH16823
Function
Master Reset
Qualification Status
Not Qualified
Output Type
Tri-State, Non-Inverted
Number of Elements
2
Polarity
Non-Inverting
Supply Voltage-Min (Vsup)
1.65V
Load Capacitance
50pF
Number of Ports
2
Output Current
24mA
Number of Bits
18
Clock Frequency
250MHz
Propagation Delay
3.5 ns
Turn On Delay Time
1 ns
Family
ALVC/VCX/A
Logic Function
D-Type, Flip-Flop
Current - Quiescent (Iq)
40μA
Current - Output High, Low
24mA 24mA
Number of Bits per Element
9
Max Propagation Delay @ V, Max CL
3.5ns @ 3.3V, 30pF
Trigger Type
Positive Edge
Input Capacitance
4.5pF
Power Supply Current-Max (ICC)
0.04mA
Number of Output Lines
3
Count Direction
UNIDIRECTIONAL
Clock Edge Trigger Type
Positive Edge
Translation
N/A
Max [email protected]
150000000Hz
Height
1.2mm
Length
11.3mm
Width
4.4mm
Thickness
1.05mm
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
Pricing & Ordering
Quantity
Unit Price
Ext. Price
SN74ALVCH16823DGVR Product Details
SN74ALVCH16823DGVR Overview
56-TFSOP (0.173, 4.40mm Width)is the way it is packaged. You can find it in the Cut Tape (CT)package. As configured, the output uses Tri-State, Non-Inverted. In the configuration of the trigger, Positive Edgeis used. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 1.65V~3.6V volts. In this case, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. In terms of FPGAs, it belongs to the 74ALVCH series. Its output frequency should not exceed 250MHz Hz. The element count is 2 . It consumes 40μA of quiescent A total of 56terminations have been recorded. This D latch belongs to the family of 74ALVCH16823. The D flip flop is powered by a voltage of 1.8V . A 4.5pFfarad input capacitance is provided by this T flip flop. The electronic device belongs to the ALVC/VCX/Afamily. There is an electronic component mounted in the way of Surface Mount. 56pins are included in its design. The clock edge trigger type for this device is Positive Edge. The part is included in FF/Latches. The flip flop is designed with 18bits. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 1.65V. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. The flip flop contains 2ports. Its output current of 24mAallows for maximum design flexibility. There are 3 output Lines, which generate the binary equivalent of the input line whose value is equal to “1” and are available to encode either a decimal or hexadecimal input pattern to typically a binary or “B. C. D” (binary coded decimal) output code.
SN74ALVCH16823DGVR Features
Cut Tape (CT) package 74ALVCH series 56 pins 18 Bits
SN74ALVCH16823DGVR Applications
There are a lot of Texas Instruments SN74ALVCH16823DGVR Flip Flops applications.