0.8V~2.7V 275MHz 1 Bit D-Type Flip Flop QUAD 74AUC1G74 8 Pins 74AUC Series 8-UFQFN
SOT-23
SN74AUC1G74RSER Datasheet
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In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
6 Weeks
Lifecycle Status
ACTIVE (Last Updated: 5 days ago)
Contact Plating
Gold
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
8-UFQFN
Number of Pins
8
Weight
5.301361mg
Operating Temperature
-40°C~85°C TA
Packaging
Tape & Reel (TR)
Series
74AUC
JESD-609 Code
e4
Pbfree Code
yes
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
8
ECCN Code
EAR99
Type
D-Type
Subcategory
FF/Latches
Packing Method
TR
Technology
CMOS
Voltage - Supply
0.8V~2.7V
Terminal Position
QUAD
Peak Reflow Temperature (Cel)
260
Supply Voltage
1.2V
Terminal Pitch
0.5mm
Base Part Number
74AUC1G74
Function
Set(Preset) and Reset
Output Type
Differential
Polarity
Non-Inverting
Supply Voltage-Max (Vsup)
2.7V
Number of Circuits
1
Number of Bits
1
Clock Frequency
275MHz
Propagation Delay
2.4 ns
Quiescent Current
10μA
Turn On Delay Time
9.5 ns
Family
AUC
Logic Function
AND, D-Type
Output Characteristics
3-STATE
Current - Output High, Low
9mA 9mA
Max I(ol)
0.009 A
Max Propagation Delay @ V, Max CL
1.8ns @ 2.5V, 30pF
Trigger Type
Positive Edge
Input Capacitance
2.5pF
fmax-Min
275 MHz
Clock Edge Trigger Type
Positive Edge
Max [email protected]
200000000Hz
Height
600μm
Length
1.5mm
Width
1.5mm
Thickness
550μm
Radiation Hardening
No
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
Pricing & Ordering
Quantity
Unit Price
Ext. Price
SN74AUC1G74RSER Product Details
SN74AUC1G74RSER Overview
The package is in the form of 8-UFQFN. There is an embedded version in the package Tape & Reel (TR). As configured, the output uses Differential. There is a trigger configured with Positive Edge. Surface Mountis in the way of this electric part. A voltage of 0.8V~2.7Vis required for its operation. A temperature of -40°C~85°C TAis considered to be the operating temperature. It is an electronic flip flop with the type D-Type. In terms of FPGAs, it belongs to the 74AUC series. In order for it to function properly, its output frequency should not exceed 275MHz. The number of terminations is 8. This D latch belongs to the family of 74AUC1G74. The D flip flop is powered by a voltage of 1.2V . The input capacitance of this JK flip flopis 2.5pF farads. Devices in the AUCfamily are electronic devices. There is an electronic part mounted in the way of Surface Mount. The electronic flip flop is designed with pins 8. In this device, the clock edge trigger type is Positive Edge. It is included in FF/Latches. Flip flops designed with 1bits are used in this part. In this case, the maximum supply voltage (Vsup) reaches 2.7V. The superior flexibility is achieved through the use of 1 circuits. Considering its reliability, this T flip flop is well suited for TR. This D latch consumes 10μA quiescent current at all.