SN74AUP1G80DBVRG4 Overview

The flip flop is packaged in a case of SC-74A, SOT-753. D flip flop is included in the Tape & Reel (TR)package. T flip flop is configured with an output of Inverted. JK flip flop uses Positive Edgeas the trigger. Surface Mountmounts this electrical part. A voltage of 0.8V~3.6Vis used as the supply voltage. In this case, the operating temperature is -40°C~85°C TA. D-Typeis the type of this D latch. This type of FPGA is a part of the 74AUP series. A frequency of 260MHzshould be the maximum output frequency. There is a consumption of 0.9μAof quiescent energy. A total of 5terminations have been recorded. D latch belongs to the 74AUP1G80 family. Power is supplied from a voltage of 1.2V volts. A JK flip flop with a 1.5pFfarad input capacitance is used here. This D flip flop belongs to the family of AUP/ULP/V. It is mounted by the way of Surface Mount. 5pins are included in its design. There is a clock edge trigger type of Positive Edgeon this device. The part is included in FF/Latches. Flip flops designed with 1bits are used in this part. Vsup reaches 3.6V, the maximal supply voltage. Normally, the supply voltage (Vsup) should be above 0.8V. Using 1 circuits, it is highly flexible. In light of its reliable performance, this T flip flop is well suited for TR.

SN74AUP1G80DBVRG4 Features

Tape & Reel (TR) package
74AUP series
5 pins
1 Bits

SN74AUP1G80DBVRG4 Applications

There are a lot of Texas Instruments SN74AUP1G80DBVRG4 Flip Flops applications.

• Clock pulse
• Control circuits
• Cold spare funcion
• Buffer registers
• Count Modes
• ATE
• Power down protection
• Storage Registers
• Dynamic threshold performance
• Common Clocks