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SN74HC374DWG4

SN74HC374DWG4

SN74HC374DWG4

Texas Instruments

2V~6V 70MHz 8 Bit D-Type Flip Flop DUAL 74HC374 20 Pins 8μA 74HC Series 20-SOIC (0.295, 7.50mm Width)

SOT-23

SN74HC374DWG4 Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 5 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 20-SOIC (0.295, 7.50mm Width)
Number of Pins 20
Weight 500.709277mg
Operating Temperature-40°C~85°C TA
PackagingTube
Series 74HC
JESD-609 Code e4
Pbfree Code yes
Part StatusActive
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
ECCN Code EAR99
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Technology CMOS
Voltage - Supply 2V~6V
Terminal Position DUAL
Terminal FormGULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 5V
Base Part Number 74HC374
Function Standard
Output Type Tri-State, Non-Inverted
Operating Supply Voltage5V
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 6V
Power Supplies2/6V
Supply Voltage-Min (Vsup) 2V
Number of Circuits 8
Number of Ports2
Output Current7.8mA
Number of Bits 8
Clock Frequency 70MHz
Propagation Delay230 ns
Turn On Delay Time15 ns
Family HC/UH
Logic Function D-Type, Flip-Flop
Current - Quiescent (Iq) 8μA
Current - Output High, Low 7.8mA 7.8mA
Max Propagation Delay @ V, Max CL 31ns @ 6V, 50pF
Prop. [email protected] 45 ns
Trigger Type Positive Edge
Input Capacitance3pF
Number of Input Lines 3
Count Direction UNIDIRECTIONAL
Clock Edge Trigger Type Positive Edge
Max [email protected] 24000000Hz
Height 2.65mm
Length 12.8mm
Width 7.5mm
Thickness 2.35mm
Radiation HardeningNo
RoHS StatusROHS3 Compliant
Lead Free Lead Free
In-Stock:3466 items

Pricing & Ordering

QuantityUnit PriceExt. Price
1$1.074000$1.074
10$1.013208$10.13208
100$0.955856$95.5856
500$0.901751$450.8755
1000$0.850709$850.709

SN74HC374DWG4 Product Details

SN74HC374DWG4 Overview


In the form of 20-SOIC (0.295, 7.50mm Width), it has been packaged. D flip flop is embedded in the Tube package. As configured, the output uses Tri-State, Non-Inverted. This trigger uses the value Positive Edge. Surface Mountis occupied by this electronic component. A supply voltage of 2V~6V is required for operation. It is operating at -40°C~85°C TA. The type of this D latch is D-Type. The FPGA belongs to the 74HC series. You should not exceed 70MHzin its output frequency. The element count is 1 . This process consumes 8μA quiescents. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The 74HC374 family contains it. The D flip flop is powered by a voltage of 5V . A JK flip flop with a 3pFfarad input capacitance is used here. In terms of electronic devices, this device belongs to the HC/UHfamily of devices. There is an electronic component mounted in the way of Surface Mount. The electronic flip flop is designed with pins 20. There is a clock edge trigger type of Positive Edgeon this device. The part is included in FF/Latches. 8bits are used in its design. It reaches 6Vwhen the maximum supply voltage (Vsup) is applied. For normal operation, the supply voltage (Vsup) should be kept above 2V. Its flexibility is enhanced by 8 circuits. A total of 2/6V power supplies are needed to run it. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. For high efficiency, the supply voltage should be set to 5V. With an output current of 7.8mA, it is possible to design the device in any way you want. It is reported that there are 3 input lines.

SN74HC374DWG4 Features


Tube package
74HC series
20 pins
8 Bits
2/6V power supplies

SN74HC374DWG4 Applications


There are a lot of Texas Instruments SN74HC374DWG4 Flip Flops applications.

  • Communications
  • Buffer registers
  • Power down protection
  • Data Synchronizers
  • ESD performance
  • Bus hold
  • CMOS Process
  • Consumer
  • Patented noise
  • Frequency Divider circuits

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