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SN74LVC16374DGGR

SN74LVC16374DGGR

SN74LVC16374DGGR

Texas Instruments

2.7V~3.6V 100MHz 16 Bit D-Type Flip Flop DUAL 74LVC16374 48 Pins 40μA 74LVC Series 48-TFSOP (0.240, 6.10mm Width)

SOT-23

SN74LVC16374DGGR Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 23 hours ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 48-TFSOP (0.240, 6.10mm Width)
Number of Pins 48
Weight 223.195796mg
Operating Temperature -40°C~85°C TA
Packaging Cut Tape (CT)
Series 74LVC
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 48
ECCN Code EAR99
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Packing Method TR
Technology CMOS
Voltage - Supply 2.7V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.5mm
[email protected] Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74LVC16374
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Operating Supply Voltage 3.3V
Number of Elements 2
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 3.6V
Load Capacitance 50pF
Number of Ports 2
Output Current 24mA
Number of Bits 16
Clock Frequency 100MHz
Propagation Delay 8.5 ns
Turn On Delay Time 1.5 ns
Family LVC/LCX/Z
Logic Function D-Type, Flip-Flop
Current - Quiescent (Iq) 40μA
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 7.5ns @ 3.3V, 50pF
Prop. [email protected] 7.5 ns
Trigger Type Positive Edge
Input Capacitance 3.5pF
Power Supply Current-Max (ICC) 0.04mA
Number of Output Lines 1
Count Direction UNIDIRECTIONAL
Clock Edge Trigger Type Positive Edge
Translation N/A
Height 1.2mm
Length 12.5mm
Width 6.1mm
Thickness 1.15mm
RoHS Status ROHS3 Compliant
Lead Free Lead Free
Pricing & Ordering
Quantity Unit Price Ext. Price
2,000 $0.55020 $1.1004
6,000 $0.52269 $3.13614
10,000 $0.50304 $5.0304
SN74LVC16374DGGR Product Details

SN74LVC16374DGGR Overview


The item is packaged in 48-TFSOP (0.240, 6.10mm Width)cases. As part of the package Cut Tape (CT), it is embedded. Currently, the output is configured to use Tri-State, Non-Inverted. The trigger configured with it uses Positive Edge. This electronic part is mounted in the way of Surface Mount. A supply voltage of 2.7V~3.6V is required for operation. In the operating environment, the temperature is -40°C~85°C TA. A flip flop of this type is classified as a D-Type. JK flip flop belongs to the 74LVCseries of FPGAs. Its output frequency should not exceed 100MHz Hz. A total of 2elements are present in it. As a result, it consumes 40μA quiescent current. There have been 48 terminations. Members of the 74LVC16374family make up this object. A voltage of 3.3V is used as the power supply for this D latch. Input capacitance of this device is 3.5pF farads. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. Surface Mount mounts this electronic component. Basically, it is designed with a set of 48 pins. In this device, the clock edge trigger type is Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. 16bits are used in its design. It reaches 3.6Vwhen the maximum supply voltage (Vsup) is applied. Considering its reliability, this T flip flop is well suited for TR. The flip flop has 2ports embedded within it. If high efficiency is desired, the supply voltage should be kept at 3.3V. As a result of its output current of 24mA, it is very flexible in terms of design. The JK flip flop is with 1 output lines to operate.

SN74LVC16374DGGR Features


Cut Tape (CT) package
74LVC series
48 pins
16 Bits

SN74LVC16374DGGR Applications


There are a lot of Texas Instruments SN74LVC16374DGGR Flip Flops applications.

  • 2 – Bit synchronous counter
  • Frequency Divider circuits
  • Safety Clamp
  • Common Clocks
  • Supports Live Insertion
  • Shift registers
  • High Performance Logic for test systems
  • ESD protection
  • Asynchronous counter
  • Single Up Count-Control Line

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