1.65V~5.5V 140MHz 1 Bit D-Type Flip Flop DUAL 74LVC2G74 8 Pins 10μA 74LVC Series 8-VFSOP (0.091, 2.30mm Width)
SOT-23
SN74LVC2G74DCUT Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
6 Weeks
Lifecycle Status
ACTIVE (Last Updated: 1 week ago)
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
8-VFSOP (0.091, 2.30mm Width)
Number of Pins
8
Weight
9.610488mg
Operating Temperature
-40°C~125°C TA
Packaging
Tape & Reel (TR)
Series
74LVC
JESD-609 Code
e4
Pbfree Code
yes
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
8
Termination
SMD/SMT
ECCN Code
EAR99
Type
D-Type
Terminal Finish
Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory
FF/Latches
Packing Method
TR
Technology
CMOS
Voltage - Supply
1.65V~5.5V
Terminal Position
DUAL
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
260
Supply Voltage
1.8V
Terminal Pitch
0.5mm
Base Part Number
74LVC2G74
Function
Set(Preset) and Reset
Output Type
Differential
Operating Supply Voltage
3.3V
Polarity
Non-Inverting
Supply Voltage-Max (Vsup)
5.5V
Number of Circuits
1
Output Current
32mA
Number of Bits
1
Clock Frequency
140MHz
Propagation Delay
6.2 ns
Turn On Delay Time
4.1 ns
Family
LVC/LCX/Z
Logic Function
AND, D-Type
Current - Quiescent (Iq)
10μA
Output Characteristics
3-STATE
Current - Output High, Low
32mA 32mA
Number of Gates
2
Max Propagation Delay @ V, Max CL
5.4ns @ 5V, 50pF
Prop. [email protected]
5.9 ns
Trigger Type
Positive Edge
Input Capacitance
5pF
Clock Edge Trigger Type
Positive Edge
Height
900μm
Length
2.3mm
Width
2mm
Thickness
850μm
Radiation Hardening
No
REACH SVHC
No SVHC
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$1.32000
$1.32
500
$1.3068
$653.4
1000
$1.2936
$1293.6
1500
$1.2804
$1920.6
2000
$1.2672
$2534.4
2500
$1.254
$3135
SN74LVC2G74DCUT Product Details
SN74LVC2G74DCUT Overview
8-VFSOP (0.091, 2.30mm Width)is the way it is packaged. It is included in the package Tape & Reel (TR). The output it is configured with uses Differential. In the configuration of the trigger, Positive Edgeis used. In this case, the electronic component is mounted in the way of Surface Mount. Powered by a 1.65V~5.5Vvolt supply, it operates as follows. In this case, the operating temperature is -40°C~125°C TA. It belongs to the type D-Typeof flip flops. JK flip flop belongs to the 74LVCseries of FPGAs. Its output frequency should not exceed 140MHz Hz. This process consumes 10μA quiescents. A total of 8terminations have been recorded. The 74LVC2G74 family contains this object. An input voltage of 1.8Vpowers the D latch. A 5pFfarad input capacitance is provided by this T flip flop. LVC/LCX/Zis the family of this D flip flop. There is an electronic component mounted in the way of Surface Mount. The electronic flip flop is designed with pins 8. Its clock edge trigger type is Positive Edge. This device is part of the FF/Latchesbase part number family. The design is based on 1bits. Vsup reaches its maximum value at 5.5V. Despite its superior flexibility, it relies on 1 circuits to achieve it. Considering its reliability, this T flip flop is well suited for TR. If high efficiency is to be achieved, the supply voltage should be maintained at 3.3V. It offers maximum design flexibility with its output current of 32mA. 2 gates are contained in its basic building block.