18 Bit Scan Test Universal Bus Transceiver -40°C~85°C Universal Bus Functions 74LVTH Series 74LVTH18512 64 Pin 0.5mm 3.3V 64-TFSOP (0.240, 6.10mm Width)
SOT-23
SN74LVTH18512DGGR Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Lifecycle Status
ACTIVE (Last Updated: 3 days ago)
Factory Lead Time
6 Weeks
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
64-TFSOP (0.240, 6.10mm Width)
Number of Pins
64
Weight
259.993477mg
Operating Temperature
-40°C~85°C
Packaging
Tape & Reel (TR)
Series
74LVTH
JESD-609 Code
e4
Pbfree Code
yes
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
64
ECCN Code
EAR99
Terminal Finish
Nickel/Palladium/Gold (Ni/Pd/Au)
Additional Feature
SUPPORTS IEEE STANDARD 1149.1-1990 BOUNDARY SCAN
Packing Method
TR
Voltage - Supply
2.7V~3.6V
Terminal Position
DUAL
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
260
Number of Functions
2
Supply Voltage
3.3V
Terminal Pitch
0.5mm
Base Part Number
74LVTH18512
Pin Count
64
Operating Supply Voltage
3.3V
Number of Elements
2
Polarity
Non-Inverting
Supply Voltage-Max (Vsup)
3.6V
Number of Circuits
18-Bit
Number of Ports
2
Output Current
64mA
Number of Bits
18
Propagation Delay
20 ns
Quiescent Current
18mA
Turn On Delay Time
20 ns
Family
LVT
Logic Function
Transceiver
Direction
Bidirectional
Output Characteristics
3-STATE WITH SERIES RESISTOR
Current - Output High, Low
32mA 64mA
Logic Type
Scan Test Universal Bus Transceiver
Prop. Delay@Nom-Sup
4.9 ns
Trigger Type
POSITIVE EDGE
Control Type
INDEPENDENT CONTROL
Translation
N/A
Height
1.2mm
Length
17mm
Width
6.1mm
Thickness
1.15mm
REACH SVHC
No SVHC
Radiation Hardening
No
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
Pricing & Ordering
Quantity
Unit Price
Ext. Price
2,000
$4.44080
$8.8816
SN74LVTH18512DGGR Product Details
SN74LVTH18512DGGR Overview
As part of 64-TFSOP (0.240, 6.10mm Width), it is embedded. Packaged in the manner of Tape & Reel (TR). The superior flexibility of 18-Bit circuits is achieved through their use. Logic type Scan Test Universal Bus Transceiver describes this electrical device. Surface Mount is pointing towards the electronic part. A higher operating temperature than -40°C~85°C is recommended. The high/low output current of 32mA 64mA enables maximum design flexibility. The 74LVTH series contains this type of FPGA. The supply voltage is 2.7V~3.6V. 74LVTH18512 family is its parent. In 64 terminations, a transmission line is terminated with an impedance-matched device. It is important to keep the supply voltage above 3.3V for normal operation. The pin count is 64. An electronic part designed with 18 Bits is used in this product. Termination with a 2 termination matches the characteristic impedance of the transmission line. A Surface Mount-shaped electronic component is mounted here. A 64-pin design is used. It is a LVT-family electronic device. Upon reaching 3.6V, Vsup reaches its maximal value. The element has 2 elements. There is a trigger configured with POSITIVE EDGE. The device's reliability makes it well suited for TR. Moreover, it is characterized by SUPPORTS IEEE STANDARD 1149.1-1990 BOUNDARY SCAN as well. 64mA's output current allows it to be designed in a wide variety of ways. Supply voltage 3.3V is used by this electrical part. There is no external influence on how it consumes 18mA of quiescent current.
SN74LVTH18512DGGR Features
64-TFSOP (0.240, 6.10mm Width) package 74LVTH series 74LVTH18512 family 64 pin count 64 pins 2 elements
SN74LVTH18512DGGR Applications
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