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TC7SG34AFS(TPL3)

TC7SG34AFS(TPL3)

TC7SG34AFS(TPL3)

Toshiba

Clock Buffer DUAL

SOT-23

TC7SG34AFS(TPL3) Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Mount Surface Mount
Number of Pins 5
Packaging Tape and Reel
Number of Terminations 6
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Subcategory Gates
Technology CMOS
Terminal Position DUAL
Terminal Form FLAT
JESD-30 Code R-PDFP-F6
Polarity Non-Inverting
Temperature Grade INDUSTRIAL
Max Supply Voltage 3.6V
Min Supply Voltage 900mV
Load Capacitance 30pF
Propagation Delay 56 ns
Quiescent Current 1μA
Turn On Delay Time 29.6 ns
Logic Function Buffer
Number of Inputs 1
Max I(ol) 0.0003 A
High Level Output Current -8mA
Low Level Output Current 8mA
Schmitt Trigger NO
Height 550μm
Length 1.6mm
Width 1.2mm
Radiation Hardening No
RoHS Status RoHS Compliant
TC7SG34AFS(TPL3) Product Details

TC7SG34AFS(TPL3) Overview


The package is in the form of a Tape and Reel. It has 6 terminations in it, which means that it is terminated. Its recommended mounting way is Surface Mount. Operation is performed using the 5 pins. It is contained in Gates. At a minimum working temperature of -40°C, it maintains reliability. 85°C is the maximum operating temperature that ensures stable operation. As far as the supply voltage is concerned, it can handle up to a maximum of 3.6VV. As low as possible, the voltage source of the clock divider can be 900mV. It consumes 1μA quiescent current and is unaffected by external influences. It is configured when the input is 1.

TC7SG34AFS(TPL3) Features


6 terminations
Gates subcategory

TC7SG34AFS(TPL3) Applications


There are a lot of Toshiba TC7SG34AFS(TPL3) Clock Buffers & Drivers applications.

  • Hardware accelerator
  • Network attached storage
  • Mobile Internet Device (MID)
  • 5G
  • Wireless infrastructure equipment
  • Window comparator
  • DDR4 JEDEC standard LRDIMM design
  • Big data
  • Car
  • Aviation

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