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XC3S100E4TQG144CS1

XC3S100E4TQG144CS1

XC3S100E4TQG144CS1

Xilinx

1.2V V 1.6mm mm FPGAs TQFP 0.5mm mm 144

SOT-23

XC3S100E4TQG144CS1 Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Package / Case TQFP
Surface MountYES
Number of Pins 144
Published 2008
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 144
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
Max Operating Temperature85°C
Min Operating Temperature 0°C
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position QUAD
Terminal FormGULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.2V
Terminal Pitch0.5mm
Time@Peak Reflow Temperature-Max (s) 30
Number of Outputs 80
Operating Supply Voltage1.2V
Supply Voltage-Max (Vsup) 1.26V
Power Supplies1.21.2/3.32.5V
Temperature GradeOTHER
RAM Size 9kB
Clock Frequency 572MHz
Programmable Logic TypeFIELD PROGRAMMABLE GATE ARRAY
Speed Grade 4
Number of Registers 1920
Combinatorial Delay of a CLB-Max 0.76 ns
Number of CLBs 240
Number of Logic Cells2160
Number of Equivalent Gates 100000
Length 20mm
Height Seated (Max) 1.6mm
Width 20mm
Radiation HardeningNo
RoHS StatusRoHS Compliant
In-Stock:4534 items

XC3S100E4TQG144CS1 Product Details

XC3S100E4TQG144CS1 Description


XC3S100E4TQG144CS1 developed by Xilinx is a type of FPGA which is the product of further development on the basis of programmable devices such as PAL (programmable array logic) and GAL (general array logic). It emerged as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the shortcomings of custom circuits but also overcomes the shortcomings of the limited number of original programmable device gates.



XC3S100E4TQG144CS1 Features


Package/case: TQFP

Max operating temperature: 85°C

Clock frequency: 572MHz

Supply voltage: 1.2V



XC3S100E4TQG144CS1 Applications


Video segmentation system

Data delay and storage design

Communication

Indutrial applications


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