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XC95144-15PQG100I

XC95144-15PQG100I

XC95144-15PQG100I

Xilinx

0.65mm PMIC 100 Pin 5V PQFP

SOT-23

XC95144-15PQG100I Datasheet

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Specifications
Name Value
Type Parameter
Package / Case PQFP
Surface Mount YES
Number of Pins 100
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 100
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Additional Feature YES
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 245
Supply Voltage 5V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 100
Operating Supply Voltage 5V
Temperature Grade INDUSTRIAL
Number of I/O 81
Memory Type FLASH
Propagation Delay 15 ns
Turn On Delay Time 15 ns
Frequency (Max) 55.6MHz
Number of Logic Blocks (LABs) 8
Speed Grade 15
Output Function MACROCELL
Number of Macro Cells 144
JTAG BST YES
In-System Programmable YES
Length 20mm
Height Seated (Max) 3.4mm
Width 14mm
Radiation Hardening No
RoHS Status RoHS Compliant
XC95144-15PQG100I Product Details

XC95144-15PQG100I Overview


There are 144 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is contained in package [0].The device is programmed with 81 I/Os.Devices are programmed with terminations of 100.This electrical part has a terminal position of QUAD, which serves as an important point of access for passengers and freight.The power supply voltage is 5V.There is a part included in Programmable Logic Devices.100 pins are programmed on the chip.This device is also capable of displaying YES.A high level of efficiency can be achieved by maintaining the supply voltage at 5V.Data is stored using FLASH.A total of 100 pins are provided on this board.There should be a temperature above -40°C at the time of operation.Temperatures should not exceed 85°C.In its simplest form, it consists of 8 logic blocks (LABs).There should be a lower maximum frequency than 55.6MHz.

XC95144-15PQG100I Features


PQFP package
81 I/Os
100 pin count
100 pins
8 logic blocks (LABs)


XC95144-15PQG100I Applications


There are a lot of Xilinx
XC95144-15PQG100I CPLDs applications.


  • Timing control
  • Interface bridging
  • I/O expansion
  • Discrete logic functions
  • Bootloaders for FPGAs
  • Address decoders
  • Custom state machines
  • Digital systems
  • Portable digital devices
  • Handheld digital devices

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