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XCR3064XL-6CP56C

XCR3064XL-6CP56C

XCR3064XL-6CP56C

Xilinx

0.5mm PMIC 56 Pin 3.3V

SOT-23

XCR3064XL-6CP56C Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Mount Surface Mount
Number of Pins 56
Packaging Bulk
JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 56
ECCN Code EAR99
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 240
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 56
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Number of I/O 48
Memory Type EEPROM
Propagation Delay 6 ns
Frequency (Max) 192MHz
Programmable Logic Type EE PLD
Number of Gates 1500
Number of Logic Blocks (LABs) 4
Speed Grade 6
Output Function MACROCELL
Number of Macro Cells 64
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 1.35mm
RoHS Status Non-RoHS Compliant
Lead Free Contains Lead
XCR3064XL-6CP56C Product Details

XCR3064XL-6CP56C Overview


64 macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.This device has 48 I/O ports programmed into it.It is programmed that device terminations will be 56 .The terminal position of this electrical component is BOTTOM.A voltage of 3.3V is used as the power supply for this device.It is a part of family Programmable Logic Devices.It is recommended to package the chip by Bulk.Chips are programmed with 56 pins.If this device is used, you will also be able to find YES.In digital circuits, there are 1500 gates, which act as a basic building block.If high efficiency is to be achieved, the supply voltage should be maintained at 3.3V.Data storage is performed using EEPROM.In this case, Surface Mount is used to mount the electronic component.The 56 pins are designed into the board.In order to operate, the temperature should be higher than 0°C.A temperature below 70°C should be used as the operating temperature.The logic block consists of 4 l logic blocks (LABs).The maximum frequency should not exceed 192MHz.There is a type of programmable logic called EE PLD.

XCR3064XL-6CP56C Features


48 I/Os
56 pin count
56 pins
4 logic blocks (LABs)


XCR3064XL-6CP56C Applications


There are a lot of Xilinx
XCR3064XL-6CP56C CPLDs applications.


  • Address decoders
  • Custom state machines
  • Digital systems
  • Portable digital devices
  • Handheld digital devices
  • Battery operated portable devices
  • Complex programmable logic devices
  • Digital designs
  • Field programmable gate
  • Address decoding

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