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XCR3384XL-12FGG324C

XCR3384XL-12FGG324C

XCR3384XL-12FGG324C

Xilinx

1mm PMIC 3.3V FBGA

SOT-23

XCR3384XL-12FGG324C Datasheet

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Specifications
Name Value
Type Parameter
Package / Case FBGA
Surface Mount YES
JESD-609 Code e1
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 324
ECCN Code 3A991.D
Terminal Finish Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 250
Supply Voltage 3.3V
Terminal Pitch 1mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 324
Operating Supply Voltage 3.3V
Supply Voltage-Max (Vsup) 3.6V
Temperature Grade COMMERCIAL
Number of I/O 220
Memory Type EEPROM
Propagation Delay 12 ns
Frequency (Max) 83MHz
Organization 0 DEDICATED INPUTS, 220 I/O
Programmable Logic Type EE PLD
Number of Logic Blocks (LABs) 24
Speed Grade 12
Output Function MACROCELL
Number of Macro Cells 384
JTAG BST YES
In-System Programmable YES
Length 23mm
Height Seated (Max) 2.5mm
Width 23mm
Radiation Hardening No
RoHS Status RoHS Compliant
XCR3384XL-12FGG324C Product Details

XCR3384XL-12FGG324C Overview


There are 384 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.The product is contained in a FBGA package.It is equipped with 220 I/O ports.The termination of a device is set to 324.This electrical part has a terminal position of BOTTOM and is connected to the ground.The power source is powered by 3.3V volts.It belongs to the family Programmable Logic Devices.There are 324 pins on the chip.It is also possible to find YES when using this device.High efficiency requires the supply voltage to be maintained at 3.3V.In general, it is recommended to store data in EEPROM.Supply voltage (Vsup) reaches a maximum of 3.6V.Operating temperatures should be higher than 0°C°C.Temperatures should be lower than 70°C when operating.The system consists of 24 logic blocks (LABs).It is recommended that the maximum frequency is less than 83MHz.There are several types of programmable logic that can be categorized as EE PLD.

XCR3384XL-12FGG324C Features


FBGA package
220 I/Os
324 pin count
24 logic blocks (LABs)


XCR3384XL-12FGG324C Applications


There are a lot of Xilinx
XCR3384XL-12FGG324C CPLDs applications.


  • Custom state machines
  • Digital systems
  • Portable digital devices
  • Handheld digital devices
  • Battery operated portable devices
  • Complex programmable logic devices
  • Digital designs
  • Field programmable gate
  • Address decoding
  • D/T registers and latches

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