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XCR3512XL-12FGG324I

XCR3512XL-12FGG324I

XCR3512XL-12FGG324I

Xilinx

1mm PMIC 324 Pin 3.3V FBGA

SOT-23

XCR3512XL-12FGG324I Datasheet

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In-Stock: 0 items
Specifications
Name Value
Type Parameter
Factory Lead Time 6 Weeks
Mount Surface Mount
Package / Case FBGA
Number of Pins 324
Published 1996
JESD-609 Code e1
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 324
ECCN Code 3A991.D
Terminal Finish Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 250
Supply Voltage 3.3V
Terminal Pitch 1mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 324
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Supply Voltage-Max (Vsup) 3.6V
Temperature Grade INDUSTRIAL
Number of I/O 260
Memory Type EEPROM
Propagation Delay 12 ns
Frequency (Max) 77MHz
Programmable Logic Type EE PLD
Number of Gates 12000
Number of Logic Blocks (LABs) 32
Speed Grade 12
Output Function MACROCELL
Number of Macro Cells 512
JTAG BST YES
In-System Programmable YES
Length 23mm
Height Seated (Max) 2.5mm
Width 23mm
RoHS Status RoHS Compliant
XCR3512XL-12FGG324I Product Details

XCR3512XL-12FGG324I Overview


There are 512 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is contained in package [0].The device is programmed with 260 I/Os.Devices are programmed with terminations of 324.This electrical part has a terminal position of BOTTOM, which serves as an important point of access for passengers and freight.The power supply voltage is 3.3V.There is a part included in Programmable Logic Devices.324 pins are programmed on the chip.This device is also capable of displaying YES.As a building block for digital circuits, there are 12000 gates.A high level of efficiency can be achieved by maintaining the supply voltage at 3.3V.Data is stored using EEPROM.Surface Mount is used to mount this electronic component.A total of 324 pins are provided on this board.3.6V is the maximum supply voltage (Vsup).There should be a temperature above -40°C at the time of operation.Temperatures should not exceed 85°C.In its simplest form, it consists of 32 logic blocks (LABs).There should be a lower maximum frequency than 77MHz.A programmable logic type is categorized as EE PLD.

XCR3512XL-12FGG324I Features


FBGA package
260 I/Os
324 pin count
324 pins
32 logic blocks (LABs)


XCR3512XL-12FGG324I Applications


There are a lot of Xilinx
XCR3512XL-12FGG324I CPLDs applications.


  • Timing control
  • Interface bridging
  • I/O expansion
  • Discrete logic functions
  • Bootloaders for FPGAs
  • Address decoders
  • Custom state machines
  • Digital systems
  • Portable digital devices
  • Handheld digital devices

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