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XCV300-5BGG432I

XCV300-5BGG432I

XCV300-5BGG432I

Xilinx

1.7mm mm FPGAs 1.27mm mm 432

SOT-23

XCV300-5BGG432I Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Surface MountYES
JESD-609 Code e1
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 432
ECCN Code EAR99
Terminal Finish Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
HTS Code8542.39.00.01
Technology CMOS
Terminal Position BOTTOM
Terminal FormBALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 2.5V
Terminal Pitch1.27mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count432
JESD-30 Code S-PBGA-B432
Qualification StatusNot Qualified
Supply Voltage-Max (Vsup) 2.625V
Supply Voltage-Min (Vsup) 2.375V
Clock Frequency 294MHz
Programmable Logic TypeFIELD PROGRAMMABLE GATE ARRAY
Number of Gates322970
Combinatorial Delay of a CLB-Max 0.7 ns
Number of CLBs 1536
Length 40mm
Height Seated (Max) 1.7mm
Width 40mm
RoHS StatusRoHS Compliant
In-Stock:4906 items

XCV300-5BGG432I Product Details

XCV300-5BGG432I Overview


This kind of FPGA is composed of FIELD PROGRAMMABLE GATE ARRAY. It is powered from a supply voltage of 2.5V. There are a total of 432 terminations. The basic building block of this system consists of 322970 gates. There are a total of 432 pins on this device. Typically, it uses a crystal oscillating at 294MHz in order to operate. Its architecture is based on 1536 CLBs. In order to keep this FPGA in check, the supply voltage should be greater than 2.375V.

XCV300-5BGG432I Features




XCV300-5BGG432I Applications


There are a lot of Xilinx
XCV300-5BGG432I FPGAs applications.


  • Bioinformatics
  • Device controllers
  • Software-defined radio
  • Random logic
  • ASIC prototyping
  • Medical imaging
  • Computer hardware emulation
  • Integrating multiple SPLDs
  • Voice recognition
  • Cryptography

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