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XCV400-4BGG560I

XCV400-4BGG560I

XCV400-4BGG560I

Xilinx

1.7mm mm FPGAs 1.27mm mm 560

SOT-23

XCV400-4BGG560I Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Surface MountYES
JESD-609 Code e1
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 560
ECCN Code EAR99
Terminal Finish Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
HTS Code8542.39.00.01
Technology CMOS
Terminal Position BOTTOM
Terminal FormBALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 2.5V
Terminal Pitch1.27mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count560
JESD-30 Code S-PBGA-B560
Qualification StatusNot Qualified
Supply Voltage-Max (Vsup) 2.625V
Supply Voltage-Min (Vsup) 2.375V
Clock Frequency 250MHz
Programmable Logic TypeFIELD PROGRAMMABLE GATE ARRAY
Number of Gates468252
Combinatorial Delay of a CLB-Max 0.8 ns
Number of CLBs 2400
Length 42.5mm
Height Seated (Max) 1.7mm
Width 42.5mm
RoHS StatusRoHS Compliant
In-Stock:3888 items

XCV400-4BGG560I Product Details

XCV400-4BGG560I Overview


This kind of FPGA is composed of FIELD PROGRAMMABLE GATE ARRAY. Fpga chips is powered from a supply voltage of 2.5V. Fpga chips is designed wFpga chipsh 560 terminations. Its basic building block contains 468252 gates. Fpga semiconductor is equipped wfpga semiconductorh 560 pin count. Typically, fpga semiconductor uses a crystal oscillating at 250MHz . 2400 CLBs are basic modules used for its architecture. The supply voltage (Vsup) should be greater than 2.375V to keep this FPGA in-check.

XCV400-4BGG560I Features




XCV400-4BGG560I Applications


There are a lot of Xilinx
XCV400-4BGG560I FPGAs applications.


  • Digital signal processing
  • Bioinformatics
  • Device controllers
  • Software-defined radio
  • Random logic
  • ASIC prototyping
  • Medical imaging
  • Computer hardware emulation
  • Integrating multiple SPLDs
  • Voice recognition

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