625 Terminations -40°C~125°C TJ System On Chip Zynq® UltraScale+™ MPSoC EG Series 128 I/O 0.85V
SOT-23
XAZU2EG-1SFVA625Q Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
11 Weeks
Package / Case
625-BFBGA, FCBGA
Surface Mount
YES
Operating Temperature
-40°C~125°C TJ
Packaging
Tray
Series
Zynq® UltraScale+™ MPSoC EG
Part Status
Active
Moisture Sensitivity Level (MSL)
4 (72 Hours)
Number of Terminations
625
HTS Code
8542.31.00.01
Terminal Position
BOTTOM
Terminal Form
BALL
Peak Reflow Temperature (Cel)
NOT SPECIFIED
Supply Voltage
0.85V
Terminal Pitch
0.8mm
Time@Peak Reflow Temperature-Max (s)
NOT SPECIFIED
JESD-30 Code
S-PBGA-B625
Number of I/O
128
Speed
500MHz, 1.2GHz
RAM Size
1.2MB
uPs/uCs/Peripheral ICs Type
MICROPROCESSOR CIRCUIT
Core Processor
Quad ARM® Cortex®-A53 MPCore™ with CoreSight™, Dual ARM®Cortex™-R5 with CoreSight™, ARM Mali™-400 MP2
Peripherals
DMA, WDT
Connectivity
CANbus, I2C, SPI, UART/USART, USB
Architecture
MPU, FPGA
Primary Attributes
Zynq®UltraScale+™ FPGA, 103K+ Logic Cells
Length
21mm
Height Seated (Max)
3.43mm
Width
21mm
RoHS Status
ROHS3 Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$388.70000
$388.7
XAZU2EG-1SFVA625Q Product Details
This SoC is built on Quad ARM® Cortex®-A53 MPCore™ with CoreSight™, Dual ARM®Cortex™-R5 with CoreSight™, ARM Mali™-400 MP2 core processor(s).
Based on the core processor(s) Quad ARM® Cortex®-A53 MPCore™ with CoreSight™, Dual ARM®Cortex™-R5 with CoreSight™, ARM Mali™-400 MP2, this SoC has been developed.The manufacturer assigns this system on a chip with a 625-BFBGA, FCBGA package as per the manufacturer's specifications.A SoC chip with 1.2MB RAM is provided for users to enjoy reliable performance.As far as its internal architecture is concerned, this SoC design employs the MPU, FPGA technique.It is part of the Zynq® UltraScale+™ MPSoC EG series of system on a chips.It is recommended that this SoC meaning be operated at -40°C~125°C TJ on an average.As one of the most important things to note is that this SoC security combines Zynq®UltraScale+™ FPGA, 103K+ Logic Cells together.Tray package houses this SoC system on a chip.An integral part of this SoC consists of a total of 128 I/Os.For safe operation, it is advisable to utilize a power supply with 0.85V voltage.The system on a chip uses 625 terminations in total.The SoC meaning uses MICROPROCESSOR CIRCUIT as its interface with the peripheral ICs and uPs.
Quad ARM® Cortex®-A53 MPCore™ with CoreSight™, Dual ARM®Cortex™-R5 with CoreSight™, ARM Mali™-400 MP2 processor.
1.2MB RAM. Built on MPU, FPGA. MICROPROCESSOR CIRCUIT
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