1V V 1.5mm mm FPGAs Artix-7 Series 324-LFBGA, CSPBGA 0.8mm mm 325
SOT-23
XC7A15T-2CSG325I Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
10 Weeks
Contact Plating
Copper, Silver, Tin
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
324-LFBGA, CSPBGA
Number of Pins
325
Operating Temperature
-40°C~100°C TJ
Packaging
Tray
Published
2010
Series
Artix-7
JESD-609 Code
e1
Part Status
Active
Moisture Sensitivity Level (MSL)
3 (168 Hours)
Number of Terminations
325
ECCN Code
EAR99
Terminal Finish
Tin/Silver/Copper (Sn/Ag/Cu)
Voltage - Supply
0.95V~1.05V
Terminal Position
BOTTOM
Terminal Form
BALL
Peak Reflow Temperature (Cel)
NOT SPECIFIED
Supply Voltage
1V
Terminal Pitch
0.8mm
[email protected] Reflow Temperature-Max (s)
NOT SPECIFIED
Operating Supply Voltage
1V
Number of I/O
150
RAM Size
112.5kB
Programmable Logic Type
FIELD PROGRAMMABLE GATE ARRAY
Number of Logic Elements/Cells
16640
Total RAM Bits
921600
Number of LABs/CLBs
1300
Speed Grade
2
Number of Registers
20800
Combinatorial Delay of a CLB-Max
1.05 ns
Height Seated (Max)
1.5mm
Length
15mm
Width
15mm
RoHS Status
ROHS3 Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$53.55000
$53.55
XC7A15T-2CSG325I Product Details
XC7A15T-2CSG325I Description
Field-programmable gate array (FPGA) made by Xilinx Inc. is the XC7A15T-2CSG325I. It belongs to the Artix-7 family of FPGAs, which are created to offer an affordable, high-performance solution for a variety of applications. 15,850 logic cells and 23,350 flip-flops are present in the 28 nm-fabricated XC7A15T-2CSG325I. Additionally, it has a maximum of 46 DSP slices that can be utilized to create sophisticated digital signal processing algorithms. The device supports a number of input/output standards, including LVCMOS, LVTTL, and several differential protocols, and has a maximum clock frequency of 450 MHz. The XC7A15T-2CSG325I can be interfaced with several devices, including CPUs, memory controllers, and sensors, and can be programmed using Xilinx's Vivado design suite.
XC7A15T-2CSG325I Features
15,850 logic cells and 23,350 flip-flops.
Maximum clock frequency of 450 MHz.
Up to 660 Kb of block RAM for data storage.
Fabricated using a 28 nm process technology.
Configurable I/Os can operate at up to 1.8 Gbps.
Can be programmed and configured using Xilinx's Vivado development suite.
Provides a range of security features, such as bitstream encryption and device-level authentication.
Up to 46 digital signal processing (DSP) slices for implementing complex signal processing functions.
Supports a range of input/output standards, including LVCMOS, LVTTL, and differential standards such as LVDS and TMDS.
Features integrated clock management circuits, which can be used to generate and distribute clock signals internally and externally.
Offers support for partial reconfiguration, meaning that some parts of the FPGA design can be modified or updated without disrupting other parts.