In System Programmable (min 1K program/erase cycles)
Number of I/O
180
Memory Type
EEPROM
Propagation Delay
10 ns
Number of Gates
12000
Max Frequency
97MHz
Speed Grade
10
Output Function
MACROCELL
Number of Macro Cells
512
JTAG BST
YES
Voltage Supply - Internal
2.7V~3.6V
Delay Time tpd(1) Max
9ns
Number of Logic Elements/Blocks
32
Height Seated (Max)
4.1mm
Length
28mm
Width
28mm
RoHS Status
Non-RoHS Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
24
$126.00083
$3024.01992
XCR3512XL-10PQ208I Product Details
XCR3512XL-10PQ208I Overview
There are 512 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is embedded in the 208-BFQFP package.In this case, there are 180 I/Os programmed.There are 208 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.This electrical component has a terminal position of 0.A voltage of 3.3V is used as the power supply for this device.It is a part of the family [0].It is recommended to package the chip by Bulk.Ensure its reliability by operating at [0].The chip should be mounted by Surface Mount.In this case, it is a type of FPGA belonging to the CoolRunner XPLA3 series.In this chip, the 208pins are programmed.It is also possible to find YESwhen using this device.A digital circuit can be constructed using 12000gates.For high efficiency, the supply voltage should be maintained at [0].It is recommended to store data in [0].This logic block consists of 32logic elements.A maximum supply voltage (Vsup) of 3.6V is provided.It is recommended that the maximal frequency be lower than 97MHz.
XCR3512XL-10PQ208I Features
208-BFQFP package 180 I/Os The operating temperature of -40°C~85°C TA 208 pin count
XCR3512XL-10PQ208I Applications
There are a lot of Xilinx Inc. XCR3512XL-10PQ208I CPLDs applications.