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XCS05-3VQ100I

XCS05-3VQ100I

XCS05-3VQ100I

Xilinx Inc.

1.2mm mm FPGAs Spartan? Series 100-TQFP 0.5mm mm 100

SOT-23

XCS05-3VQ100I Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 100-TQFP
Operating Temperature-40°C~100°C TJ
PackagingTray
Published 1999
Series Spartan®
JESD-609 Code e0
Part StatusObsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 100
ECCN Code EAR99
Terminal Finish TIN LEAD
HTS Code8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Voltage - Supply 4.5V~5.5V
Terminal Position QUAD
Terminal FormGULL WING
Peak Reflow Temperature (Cel) 225
Supply Voltage 5V
Terminal Pitch0.5mm
Reach Compliance Code unknown
[email protected] Reflow Temperature-Max (s) 30
Base Part Number XCS05
Pin Count100
Number of Outputs 77
Qualification StatusNot Qualified
Power Supplies5V
Number of I/O 77
RAM Size 400B
Clock Frequency 125MHz
Number of Inputs 77
Programmable Logic TypeFIELD PROGRAMMABLE GATE ARRAY
Number of Logic Elements/Cells 238
Total RAM Bits 3200
Number of Gates5000
Number of LABs/CLBs 100
Combinatorial Delay of a CLB-Max 1.6 ns
Number of CLBs 100
Number of Logic Cells100
Number of Equivalent Gates 2000
Height Seated (Max) 1.2mm
Length 14mm
Width 14mm
RoHS StatusNon-RoHS Compliant
Lead Free Contains Lead
In-Stock:2048 items

XCS05-3VQ100I Product Details

XCS05-3VQ100I Description


The Spartan® FPGA XCS05-3VQ100I is a high-volume production FPGA solution that delivers all the key requirements for ASIC replacement up to 40,000 gates. These requirements include high performance, on-chip RAM, core solutions, and prices that, in high volume, approach and in many cases are equivalent to mask-programmed ASIC devices. By streamlining the Spartan series feature set, leveraging advanced process technologies, and focusing on total cost management, the Spartan series delivers the key features required by ASIC and other high-volume logic users while avoiding the initial cost, long development cycles, and inherent risk of conventional ASICs.



XCS05-3VQ100I Features


First ASIC replacement FPGA for high-volume production with on-chip RAM

Density up to 1862 logic cells or 40,000 system gates

Streamlined feature set based on XC4000 architecture

System performance beyond 80 MHz

A broad set of AllianceCORE and LogiCORE™ predefined solutions are available

Unlimited programmability

Low cost



XCS05-3VQ100I Applications


Automotive

Infotainment & cluster

Communications equipment

Wireless infrastructure

Industrial

Electronic point of sale (EPOS)


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