Welcome to Hotenda.com Online Store!

logo
userjoin
Home

EP20K400EFI672-1

EP20K400EFI672-1

EP20K400EFI672-1

Altera

FPGAs 1mm mm 672

SOT-23

EP20K400EFI672-1 Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Surface MountYES
JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 672
Terminal Finish TIN LEAD
HTS Code8542.39.00.01
Terminal Position BOTTOM
Terminal FormBALL
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 1.8V
Terminal Pitch1mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
JESD-30 Code S-PBGA-B672
Number of Outputs 480
Qualification StatusNot Qualified
Power Supplies1.81.8/3.3V
Number of I/O 488
Number of Inputs 480
Organization 4 DEDICATED INPUTS, 488 I/O
Programmable Logic TypeLOADABLE PLD
Output FunctionMACROCELL
Number of Logic Cells16640
Number of Dedicated Inputs 4
RoHS StatusNon-RoHS Compliant
In-Stock:4867 items

EP20K400EFI672-1 Product Details

EP20K400EFI672-1 Overview


This kind of FPGA is composed of LOADABLE PLD. Fpga chips is programmed wFpga chipsh 488 I/Os for transferring data in a more coherent manner. Fpga chips is powered from a supply voltage of 1.8V. There are 480 outputs incorporated in this device. Fpga chips is designed wFpga chipsh 672 terminations. Fpga electronics operates from a 1.81.8/3.3V power supply. Fpga semiconductor incorporates 16640 logic cells used for the building block. There are 4 dedicated inputs used to detect the status of input signals.

EP20K400EFI672-1 Features


488 I/Os


EP20K400EFI672-1 Applications


There are a lot of Altera
EP20K400EFI672-1 FPGAs applications.


  • Digital signal processing
  • Bioinformatics
  • Device controllers
  • Software-defined radio
  • Random logic
  • ASIC prototyping
  • Medical imaging
  • Computer hardware emulation
  • Integrating multiple SPLDs
  • Voice recognition

Get Subscriber

Enter Your Email Address, Get the Latest News