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EPM5192JC-1

EPM5192JC-1

EPM5192JC-1

Altera

5V 1.27mm PMIC 5V

SOT-23

EPM5192JC-1 Datasheet

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In-Stock: 0 items
Specifications
Name Value
Type Parameter
Surface Mount YES
JESD-609 Code e0
Pbfree Code no
Number of Terminations 84
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature LABS INTERCONNECTED BY PIA; 12 LABS; 192 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 1.27mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 84
JESD-30 Code S-CQCC-J84
Qualification Status Not Qualified
Operating Temperature (Max) 70°C
Supply Voltage-Max (Vsup) 5.25V
Power Supplies 5V
Temperature Grade COMMERCIAL
Supply Voltage-Min (Vsup) 4.75V
Number of I/O 64
Clock Frequency 50MHz
Propagation Delay 40 ns
Organization 7 DEDICATED INPUTS, 64 I/O
Programmable Logic Type UV PLD
Output Function MACROCELL
Number of Macro Cells 192
JTAG BST NO
Number of Dedicated Inputs 7
In-System Programmable NO
Length 29.21mm
Height Seated (Max) 5.08mm
Width 29.21mm
RoHS Status Non-RoHS Compliant
EPM5192JC-1 Product Details

EPM5192JC-1 Overview


There are 192 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).The device is programmed with 64 I/Os.Devices are programmed with terminations of 84.This electrical part has a terminal position of QUAD, which serves as an important point of access for passengers and freight.The power supply voltage is 5V.There is a part included in Programmable Logic Devices.84 pins are programmed on the chip.This device is also capable of displaying LABS INTERCONNECTED BY PIA; 12 LABS; 192 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK.There is 5V power supply available for it.5.25V is the maximum supply voltage (Vsup).Input signals are detected using 7 dedicated inputs.In order to operate properly, the supply voltage (Vsup) should be greater than 4.75V.It should not exceed 50MHz in terms of clockfrequency.A programmable logic type is categorized as UV PLD.It is recommended that the operating temperature remain below 70°C.

EPM5192JC-1 Features


64 I/Os
84 pin count
5V power supplies


EPM5192JC-1 Applications


There are a lot of Altera
EPM5192JC-1 CPLDs applications.


  • Timing control
  • Interface bridging
  • I/O expansion
  • Discrete logic functions
  • Bootloaders for FPGAs
  • Address decoders
  • Custom state machines
  • Digital systems
  • Portable digital devices
  • Handheld digital devices

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