-40°C~100°C TJ 5ASTFD5 System On Chip Arria V ST Series MCU - 208, FPGA - 385 I/O 1.1V
SOT-23
5ASTFD5G3F35I5N Datasheet
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Specifications
Name
Value
Type
Parameter
Package / Case
1152-BBGA, FCBGA
Surface Mount
YES
Operating Temperature
-40°C~100°C TJ
Packaging
Tray
Series
Arria V ST
JESD-609 Code
e1
Part Status
Active
Moisture Sensitivity Level (MSL)
3 (168 Hours)
Terminal Finish
TIN SILVER COPPER
HTS Code
8542.39.00.01
Terminal Position
BOTTOM
Terminal Form
BALL
Peak Reflow Temperature (Cel)
NOT SPECIFIED
Supply Voltage
1.1V
Terminal Pitch
1mm
Time@Peak Reflow Temperature-Max (s)
NOT SPECIFIED
Base Part Number
5ASTFD5
JESD-30 Code
S-PBGA-B1152
Supply Voltage-Max (Vsup)
1.13V
Supply Voltage-Min (Vsup)
1.07V
Number of I/O
MCU - 208, FPGA - 385
Speed
800MHz
RAM Size
64KB
Core Processor
Dual ARM® Cortex®-A9 MPCore™ with CoreSight™
Peripherals
DMA, POR, WDT
Clock Frequency
622MHz
Connectivity
EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SPI, UART/USART, USB OTG
Architecture
MCU, FPGA
Programmable Logic Type
FIELD PROGRAMMABLE GATE ARRAY
Primary Attributes
FPGA - 462K Logic Elements
Length
35mm
Height Seated (Max)
2.7mm
Width
35mm
RoHS Status
RoHS Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
5ASTFD5G3F35I5N Product Details
This SoC is built on Dual ARM® Cortex®-A9 MPCore™ with CoreSight™ core processor(s).
A core processor Dual ARM® Cortex®-A9 MPCore™ with CoreSight™ is used to build this SoC.Its package is 1152-BBGA, FCBGA.A 64KB RAM SoC chip provides reliable performance to users.Internally, this SoC design uses the MCU, FPGA technique.A system on chip SoC of this type belongs to the Arria V ST series.For this SoC meaning, the average operating temperature should be -40°C~100°C TJ.A key point to note is that this SoC security combines FPGA - 462K Logic Elements.It comes in a state-of-the-art Tray package.Total I/Os on this SoC part are MCU - 208, FPGA - 385.A 1.1V power supply should be used.There are voltages higher than 1.13V that should be avoided when using the SoCs wireless.There is a possibility that it can be powered by a power supply of at least 1.07V.The FIELD PROGRAMMABLE GATE ARRAY can be configured to meet different design requirements.Searching 5ASTFD5 will yield system on chips with similar specs and purposes.SoCs with 622MHz clock frequencies are used in this design.
Dual ARM® Cortex®-A9 MPCore™ with CoreSight™ processor.
64KB RAM. Built on MCU, FPGA. Clock Frequency: 622MHz
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