AUIRLR3410 datasheet pdf and Transistors - FETs, MOSFETs - Single product details from Infineon Technologies stock available on our website
SOT-23
AUIRLR3410 Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
39 Weeks
Contact Plating
Tin
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
TO-252-3, DPak (2 Leads + Tab), SC-63
Number of Pins
3
Transistor Element Material
SILICON
Operating Temperature
-55°C~175°C TJ
Packaging
Tube
Published
2010
Series
HEXFET®
JESD-609 Code
e3
Part Status
Discontinued
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
2
ECCN Code
EAR99
Additional Feature
AVALANCHE RATED, HIGH RELIABILITY
Subcategory
FET General Purpose Power
Technology
MOSFET (Metal Oxide)
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
260
[email protected] Reflow Temperature-Max (s)
30
JESD-30 Code
R-PSSO-G2
Number of Elements
1
Power Dissipation-Max
79W Tc
Element Configuration
Single
Operating Mode
ENHANCEMENT MODE
Power Dissipation
79W
Case Connection
DRAIN
Turn On Delay Time
7.2 ns
FET Type
N-Channel
Transistor Application
SWITCHING
Rds On (Max) @ Id, Vgs
105m Ω @ 10A, 10V
Vgs(th) (Max) @ Id
2V @ 250μA
Input Capacitance (Ciss) (Max) @ Vds
800pF @ 25V
Current - Continuous Drain (Id) @ 25°C
17A Tc
Gate Charge (Qg) (Max) @ Vgs
34nC @ 5V
Rise Time
53ns
Drive Voltage (Max Rds On,Min Rds On)
4V 10V
Vgs (Max)
±16V
Fall Time (Typ)
26 ns
Turn-Off Delay Time
30 ns
Continuous Drain Current (ID)
17A
JEDEC-95 Code
TO-252AA
Gate to Source Voltage (Vgs)
16V
Drain to Source Breakdown Voltage
100V
Pulsed Drain Current-Max (IDM)
60A
Height
2.3876mm
Length
6.7056mm
Width
6.22mm
Radiation Hardening
No
REACH SVHC
No SVHC
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$1.15000
$1.15
500
$1.1385
$569.25
1000
$1.127
$1127
1500
$1.1155
$1673.25
2000
$1.104
$2208
2500
$1.0925
$2731.25
AUIRLR3410 Product Details
AUIRLR3410 Description
AUIRLR3410 is a type of HEXFET? power MOSFET developed by Infineon Technologies for low on-resistance per silicon area. It is designed utilizing advanced planar technology. High flexibility and reliability can be ensured based on its fast switching speed, ruggedized device design, and logic-level gate drive. All these features enable this device to be well suited for automotive and other applications.