PMIC ispXPLD? 5000MV Series LC5512 208 Pin 200MHz 208-BFQFP
SOT-23
LC5512MV-75Q208C Datasheet
non-compliant
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Specifications
Name
Value
Type
Parameter
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
208-BFQFP
Number of Pins
208
Supplier Device Package
208-PQFP (28x28)
Operating Temperature
0°C~90°C TJ
Packaging
Tray
Published
2000
Series
ispXPLD® 5000MV
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
3 (168 Hours)
Max Operating Temperature
90°C
Min Operating Temperature
0°C
Frequency
200MHz
Base Part Number
LC5512
Operating Supply Voltage
3.3V
Programmable Type
In System Programmable
Max Supply Voltage
3.6V
Min Supply Voltage
3V
Operating Supply Current
33mA
Number of I/O
149
Nominal Supply Current
33mA
RAM Size
32kB
Memory Type
EEPROM, SRAM
Propagation Delay
7.5 ns
Number of Logic Elements/Cells
16
Max Frequency
275MHz
Number of Programmable I/O
256
Number of Logic Blocks (LABs)
16
Number of Macro Cells
512
Voltage Supply - Internal
3V~3.6V
Delay Time tpd(1) Max
7.5ns
Number of Logic Elements/Blocks
16
RoHS Status
Non-RoHS Compliant
Lead Free
Lead Free
LC5512MV-75Q208C Product Details
LC5512MV-75Q208C Overview
There are 512 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).In the 208-BFQFPpackage, you will find it.As a result, it has 149 I/O ports programmed.It is packaged in the way of Tray.Due to its reliability, it is operated at a temperature of [0].It is recommended that the chip be mounted by Surface Mount.The ispXPLD? 5000MVseries FPGA is one of these types.LC5512contains its related parts.High efficiency requires a voltage supply of [0].Data storage is performed using [0].In this case, Surface Mountis used to mount the electronic component.It is designed with 208 pins.A maximum supply voltage of 3.6Vis used in its operation.Despite its minimal supply voltage of [0], it is capable of operating.This logic block consists of 16logic elements.There are 256 programmable I/Os in this system.This can be achieved at a frequency of 200MHz.The maximal frequency should be lower than 275MHz.It is recommended that the operating temperature be higher than 0°C.It is recommended to keep the operating temperature below 90°C.In total, it contains 16 logic blocks (LABs).A fundamental building block consists of 16logic elements/cells.
LC5512MV-75Q208C Features
208-BFQFP package 149 I/Os The operating temperature of 0°C~90°C TJ 208 pins 16 logic blocks (LABs)
LC5512MV-75Q208C Applications
There are a lot of Lattice Semiconductor Corporation LC5512MV-75Q208C CPLDs applications.