25LC1024-E/SM Description

A 1024kb serial EEPROM memory having byte-level and page-level features is called the 25LC1024-E/SM. Additionally, it has the chip, sector, and page erase features common to flash-based systems. For operations that write bytes or pages, these routines are not necessary. A serial bus that is compatible with the simple serial peripheral interface (SPI) is used to access the memory. A clock input (SCK) and separate data in (SI) and data out (SO) lines are needed as bus signals. A chip select (CS) input controls who has access to the device. Through the hold pin, communication with the device can be stopped. With the exception of chip select, which enables the host to handle higher priority interrupts, transitions on the device's inputs will be ignored while it is pausing.

25LC1024-E/SM Features

• 256-byte page

• 4000V ESD protection

• >200-year Data retention

• Page erase (6ms maximum)

• Chip erase (10ms maximum)

• Low-power CMOS technology

• Sector erase (10ms maximum)

• 6ms Maximum write cycle time

• 6ms Maximum write cycle time

• No page or sector erase required

• Electronic signature for device ID

• 1M Erase/write cycles endurance

• No page or sector erase required

• Built-in write protection - Power-on/off data protection circuitry

• Sector write protection (32kB/sector) - Protect none, 1/4, 1/2 or all of array

25LC1024-E/SM Applications

• Industrial

• Automotive

• Communications & Networking