Welcome to Hotenda.com Online Store!

logo
userjoin
Home

74LVC1G80GN

74LVC1G80GN

74LVC1G80GN

Nexperia

1 Bit Flip Flop DUAL

SOT-23

74LVC1G80GN Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Surface MountYES
Number of Terminals 6
ECCN (US) EAR99
Logic Family LVC
Number of Channels per Chip 1
Number of Elements per Chip 1
Number of Element Inputs 1
Number of Element Outputs 1
Bus Hold No
Triggering Type Positive-Edge
Maximum Propagation Delay Time @ Maximum CL (ns) 2.4(Typ)@3.3V|2.5(Typ)@2.7V|1.8(Typ)@5V
Absolute Propagation Delay Time (ns) 13
Process Technology CMOS
Input Signal Type Single-Ended
Maximum Low Level Output Current (mA) 32
Maximum High Level Output Current (mA) -32
Minimum Operating Supply Voltage (V) 1.65
Typical Operating Supply Voltage (V) 5|1.8|2.5|3.3
Maximum Operating Supply Voltage (V) 5.5
Maximum Quiescent Current (mA) 0.0001(Typ)
Propagation Delay Test Condition (pF) 50
Minimum Operating Temperature (°C) -40
Maximum Operating Temperature (°C) 125
Supplier Package XSON
Mounting Surface Mount
Package Height 0.31(Max)
Package Length 0.9
Package Width 1
PCB changed 6
Package Shape RECTANGULAR
Manufacturer Nexperia
JESD-609 Code e3
Part StatusActive
Terminal Finish Tin (Sn)
HTS Code8542.39.00.01
Technology CMOS
Terminal Position DUAL
Terminal FormNO LEAD
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Terminal Pitch0.3 mm
Reach Compliance Code compliant
Pin Count6
JESD-30 Code R-PDSO-N6
Qualification StatusNot Qualified
Polarity Inverting
Supply Voltage-Max (Vsup) 5.5 V
Temperature GradeAUTOMOTIVE
Supply Voltage-Min (Vsup) 1.65 V
Number of Bits 1
Family LVC/LCX/Z
Logic Function D-Type
Seated Height-Max 0.35 mm
Output Polarity INVERTED
Logic IC Type D FLIP-FLOP
Trigger Type POSITIVE EDGE
Propagation Delay (tpd) 13 ns
fmax-Min 200 MHz
Width 0.9 mm
Length 1 mm
RoHS StatusRoHS Compliant
In-Stock:2650 items

Pricing & Ordering

QuantityUnit PriceExt. Price
1$0.341100$0.3411
10$0.321792$3.21792
100$0.303578$30.3578
500$0.286394$143.197
1000$0.270183$270.183

74LVC1G80GN Product Details

74LVC1G80GN Overview


JK flip flop uses POSITIVE EDGEas the trigger. LVC/LCX/Zis the family of this D flip flop. Flip flops designed with 1bits are used in this part. Vsup reaches its maximum value at 5.5 V. It is imperative that the supply voltage (Vsup) is maintained above 1.65 Vin order to ensure normal operation. This logic IC is D FLIP-FLOP. A total of 1 functions are provided by this T flip flop. With 6 pins, it is equipped with a low power consumption.

74LVC1G80GN Features


1 Bits
1 Functions
6 pin count


74LVC1G80GN Applications


There are a lot of Nexperia
74LVC1G80GN Flip Flops applications.


  • Communications
  • Counters
  • Frequency Dividers
  • Shift Registers
  • Storage Registers
  • Bounce elimination switch
  • Data storage
  • Data transfer
  • Latch
  • Registers

Get Subscriber

Enter Your Email Address, Get the Latest News