0.8V~3.6V 309MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G374 6 Pins 74AUP Series 6-XFDFN
SOT-23
74AUP1G374GM,132 Datasheet
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In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
13 Weeks
Contact Plating
Tin
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
6-XFDFN
Number of Pins
6
Operating Temperature
-40°C~125°C TA
Packaging
Tape & Reel (TR)
Series
74AUP
JESD-609 Code
e3
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
6
Type
D-Type
Technology
CMOS
Voltage - Supply
0.8V~3.6V
Terminal Position
DUAL
Peak Reflow Temperature (Cel)
260
Supply Voltage
1.1V
Terminal Pitch
0.5mm
[email protected] Reflow Temperature-Max (s)
30
Base Part Number
74AUP1G374
Function
Standard
Output Type
Tri-State, Non-Inverted
Polarity
Non-Inverting
Supply Voltage-Min (Vsup)
0.8V
Number of Circuits
1
Number of Bits
1
Clock Frequency
309MHz
Propagation Delay
20.5 ns
Quiescent Current
500nA
Turn On Delay Time
23.6 ns
Family
AUP/ULP/V
Output Characteristics
3-STATE
Current - Output High, Low
4mA 4mA
Max Propagation Delay @ V, Max CL
5.8ns @ 3.3V, 30pF
Trigger Type
Positive Edge
Input Capacitance
0.8pF
Clock Edge Trigger Type
Positive Edge
Height Seated (Max)
0.5mm
Radiation Hardening
No
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$0.123757
$0.123757
500
$0.090998
$45.499
1000
$0.075831
$75.831
2000
$0.069570
$139.14
5000
$0.065019
$325.095
10000
$0.060482
$604.82
15000
$0.058494
$877.41
50000
$0.057516
$2875.8
74AUP1G374GM,132 Product Details
74AUP1G374GM,132 Overview
The flip flop is packaged in a case of 6-XFDFN. D flip flop is included in the Tape & Reel (TR)package. Tri-State, Non-Invertedis the output configured for it. There is a trigger configured with Positive Edge. Surface Mountis occupied by this electronic component. With a supply voltage of 0.8V~3.6V volts, it operates. Currently, the operating temperature is -40°C~125°C TA. Logic flip flops of this type are classified as D-Type. The 74AUPseries comprises this type of FPGA. Its output frequency should not exceed 309MHz. There are 6 terminations,Members of the 74AUP1G374family make up this object. A voltage of 1.1V provides power to the D latch. Its input capacitance is 0.8pFfarads. In this case, the D flip flop belongs to the AUP/ULP/Vfamily. There is an electronic part that is mounted in the way of Surface Mount. Basically, it is designed with a set of 6 pins. In this device, the clock edge trigger type is Positive Edge. An electronic part designed with 1bits is used in this application. For normal operation, the supply voltage (Vsup) should be above 0.8V. Its flexibility is enhanced by 1 circuits. 500nAquiescent current consumed.