74AUP1G80GW,125 Overview

As a result, it is packaged as 5-TSSOP, SC-70-5, SOT-353. The package Tape & Reel (TR)contains it. It is configured with Invertedas an output. Positive Edgeis the trigger it is configured with. Surface Mountis occupied by this electronic component. A 0.8V~3.6Vsupply voltage is required for it to operate. In this case, the operating temperature is -40°C~125°C TA. It belongs to the type D-Typeof flip flops. JK flip flop is a part of the 74AUPseries of FPGAs. A frequency of 309MHzshould be the maximum output frequency. It consumes 500nA of quiescent current without being affected by external factors. In 5terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. Members of the 74AUP1G80family make up this object. The power source is powered by 1.2V. Its input capacitance is 1.5pF farads. AUP/ULP/Vis the family of this D flip flop. There is an electronic part that is mounted in the way of Surface Mount. There are 5pins on it. A Positive Edgeclock edge trigger is used in this device. The flip flop is designed with 1bits. It reaches the maximum supply voltage (Vsup) at 3.6V. A normal operating voltage (Vsup) should remain above 0.8V. 1 circuits are used to achieve its superior flexibility. This T flip flop features a maximum design flexibility due to its output current of 20mA.

74AUP1G80GW,125 Features

Tape & Reel (TR) package
74AUP series
5 pins
1 Bits

74AUP1G80GW,125 Applications

There are a lot of Nexperia USA Inc. 74AUP1G80GW,125 Flip Flops applications.

• Shift Registers
• Parallel data storage
• Latch
• Computing
• Counters
• Set-reset capability
• Communications
• Differential Individual
• Patented noise
• Memory