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74LVCH162373ADGG,518

74LVCH162373ADGG,518

74LVCH162373ADGG,518

NXP Semiconductors

74LVCH162373ADGG,518 datasheet pdf and Latches, Locks product details from NXP Semiconductors stock available on our website

SOT-23

74LVCH162373ADGG,518 Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
ECCN (US) EAR99
Logic Family LVC
Latch Mode Transparent
Number of Channels per Chip 16
Number of Elements per Chip 2
Number of Inputs per Chip 16
Number of Input Enables per Element 1
Number of Selection Inputs per Element 0
Number of Outputs per Chip 16
Number of Output Enables per Element 1
Bus Hold Yes
Set/Reset No
Maximum Propagation Delay Time @ Maximum CL (ns) 3.7(Typ)@2.7V|3.4(Typ)@3.3V
Absolute Propagation Delay Time (ns) 18.5
Process Technology CMOS
Maximum Low Level Output Current (mA) 12
Maximum High Level Output Current (mA) -12
Minimum Operating Supply Voltage (V) 1.2
Typical Operating Supply Voltage (V) 1.8|2.5|3.3
Maximum Operating Supply Voltage (V) 3.6
Tolerant I/Os (V) 5
Typical Quiescent Current (uA) 0.1
Maximum Quiescent Current (uA) 80
Propagation Delay Test Condition (pF) 50
Minimum Operating Temperature (°C) -40
Maximum Operating Temperature (°C) 125
Supplier Package TSSOP
Mounting Surface Mount
Package Height 1.05(Max)
Package Length 12.6(Max)
Package Width 6.2(Max)
PCB changed 48
Packaging Tape and Reel
Part Status Unconfirmed
Type D-Type
Pin Count 48
Output Type 3-State
Polarity Non-Inverting
RoHS Status RoHS Compliant

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