The flip flop is packaged in a case of 20-TSSOP (0.173, 4.40mm Width). D flip flop is embedded in the Tube package. As configured, the output uses Non-Inverted. JK flip flop uses Positive Edgeas the trigger. This electronic part is mounted in the way of Surface Mount. A voltage of 2.7V~3.6Vis used as the supply voltage. It is operating at -40°C~85°C TA. This D latch has the type D-Type. In terms of FPGAs, it belongs to the 74LVTH series. You should not exceed 150MHzin the output frequency of the device. D latch consists of 1 elements. As a result, it consumes 190μA quiescent current. The 74LVTH273family includes it. This T flip flop has a capacitance of 3pF farads at the input.
74LVTH273MTC Features
Tube package 74LVTH series
74LVTH273MTC Applications
There are a lot of ON Semiconductor 74LVTH273MTC Flip Flops applications.