2V~5.5V 115MHz 8 Bit D-Type Flip Flop DUAL 74VHC574 20 Pins 74VHC Series 20-TSSOP (0.173, 4.40mm Width)
SOT-23
74VHC574MTCX Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
9 Weeks
Lifecycle Status
ACTIVE (Last Updated: 1 day ago)
Contact Plating
Gold
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
20-TSSOP (0.173, 4.40mm Width)
Number of Pins
20
Weight
191mg
Operating Temperature
-40°C~85°C TA
Packaging
Tape & Reel (TR)
Published
2009
Series
74VHC
JESD-609 Code
e4
Pbfree Code
yes
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
20
ECCN Code
EAR99
Type
D-Type
Subcategory
FF/Latches
Packing Method
TR
Technology
CMOS
Voltage - Supply
2V~5.5V
Terminal Position
DUAL
Terminal Form
GULL WING
Supply Voltage
3.3V
Terminal Pitch
0.65mm
Base Part Number
74VHC574
Function
Standard
Number of Outputs
10
Output Type
Tri-State, Non-Inverted
Number of Elements
1
Polarity
Non-Inverting
Supply Voltage-Max (Vsup)
5.5V
Supply Voltage-Min (Vsup)
2V
Number of Channels
8
Load Capacitance
50pF
Number of Ports
2
Number of Bits
8
Clock Frequency
115MHz
Propagation Delay
19 ns
Quiescent Current
4μA
Turn On Delay Time
5.6 ns
Family
AHC/VHC
Logic Function
D-Type, Flip-Flop
Output Characteristics
3-STATE
Current - Output High, Low
8mA 8mA
Max Propagation Delay @ V, Max CL
10.6ns @ 5V, 50pF
Trigger Type
Positive Edge
Input Capacitance
4pF
Number of Input Lines
2
Clock Edge Trigger Type
Positive Edge
Max [email protected]
75000000Hz
Length
6.5mm
Width
4.4mm
Radiation Hardening
No
REACH SVHC
No SVHC
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
Pricing & Ordering
Quantity
Unit Price
Ext. Price
74VHC574MTCX Product Details
74VHC574MTCX Overview
The item is packaged in 20-TSSOP (0.173, 4.40mm Width)cases. It is contained within the Tape & Reel (TR)package. In the configuration, Tri-State, Non-Invertedis used as the output. JK flip flop uses Positive Edgeas the trigger. It is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~5.5V. Temperature is set to -40°C~85°C TA. Logic flip flops of this type are classified as D-Type. JK flip flop is a part of the 74VHCseries of FPGAs. Its output frequency should not exceed 115MHz Hz. D latch consists of 1 elements. 20terminations have occurred. The 74VHC574 family contains it. Power is provided by a 3.3V supply. Its input capacitance is 4pFfarads. It is a member of the AHC/VHCfamily of D flip flop. It is mounted by the way of Surface Mount. This board is designed with 20pins on it. In this device, the clock edge trigger type is Positive Edge. This device has the base part number FF/Latches. The design is based on 8bits. The maximal supply voltage (Vsup) reaches 5.5V. For normal operation, the supply voltage (Vsup) should be above 2V. As a result of its reliable performance, this T flip flop is suitable for TR. The flip flop has 2embedded ports. It has 2lines. As a result, it consumes 4μA of quiescent current without being affected by external factors. It is of 8 channels.