20-SOIC (0.295, 7.50mm Width)is the packaging method. You can find it in the Tape & Reel (TR)package. Tri-State, Non-Invertedis the output configured for it. JK flip flop uses Positive Edgeas the trigger. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at a voltage of 2V~6V. In the operating environment, the temperature is -55°C~125°C TA. This electronic flip flop is of type D-Type. It belongs to the Automotive, AEC-Q100, 74HCseries of FPGAs. A frequency of 35MHzshould be the maximum output frequency. D latch consists of 1 elements. There are 20 terminations,A voltage of 5V is used to power it. The input capacitance of this T flip flop is 10pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. A device of this type belongs to the family of HC/UH. There is an electronic part mounted in the way of Surface Mount. A total of 20pins are provided on this board. This device's clock edge trigger type is Positive Edge. Vsup reaches its maximum value at 6V. Normally, the supply voltage (Vsup) should be kept above 2V. This D flip flop is equipped with 0 ports. In terms of quiescent current, it consumes 4μA .