The flip flop is packaged in 20-SOIC (0.295, 7.50mm Width). There is an embedded version in the package Tube. It is configured with Non-Invertedas an output. JK flip flop uses Positive Edgeas the trigger. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~3.6V. A temperature of -40°C~85°C TAis considered to be the operating temperature. Logic flip flops of this type are classified as D-Type. JK flip flop belongs to the 74LVQseries of FPGAs. This D flip flop should not have a frequency greater than 90MHz. In total, it contains 1 elements. T flip flop consumes 40μA quiescent energy. A total of 20 terminations have been made. Power is provided by a 2.7V supply. The input capacitance of this JK flip flopis 4.5pF farads. In this case, the D flip flop belongs to the LVQfamily. It reaches 3.6Vwhen the supply voltage is maximal (Vsup). Keeping the supply voltage (Vsup) above 2V is necessary for normal operation.
74LVQ273SC Features
Tube package 74LVQ series
74LVQ273SC Applications
There are a lot of Rochester Electronics, LLC 74LVQ273SC Flip Flops applications.