In the form of 20-TSSOP (0.173, 4.40mm Width), it has been packaged. The package Tubecontains it. In the configuration, Tri-State, Non-Invertedis used as the output. The trigger it is configured with uses Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 4.5V~5.5V. It is at -40°C~85°C TAdegrees Celsius that the system is operating. The type of this D latch is D-Type. In FPGA terms, D flip flop is a type of 74ABTseries FPGA. Its output frequency should not exceed 400MHz. The list contains 1 elements. There is a consumption of 250μAof quiescent energy. This JK flip flop has a 3pFfarad input capacitance.
74ABT574APW,112 Features
Tube package 74ABT series
74ABT574APW,112 Applications
There are a lot of Rochester Electronics, LLC 74ABT574APW,112 Flip Flops applications.