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74LVX374SJX

74LVX374SJX

74LVX374SJX

Rochester Electronics, LLC

2V~3.6V 95MHz D-Type Flip Flop 4μA 74LVX Series 20-SOIC (0.209, 5.30mm Width)

SOT-23

74LVX374SJX Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Mounting Type Surface Mount
Package / Case 20-SOIC (0.209, 5.30mm Width)
Supplier Device Package 20-SOP
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74LVX
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Type D-Type
Voltage - Supply 2V~3.6V
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Clock Frequency 95MHz
Current - Quiescent (Iq) 4μA
Current - Output High, Low 4mA 4mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 14.1ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 4pF
RoHS Status ROHS3 Compliant
Pricing & Ordering
Quantity Unit Price Ext. Price
1 $0.27000 $0.27
500 $0.2673 $133.65
1000 $0.2646 $264.6
1500 $0.2619 $392.85
2000 $0.2592 $518.4
2500 $0.2565 $641.25
74LVX374SJX Product Details

74LVX374SJX Overview


In the form of 20-SOIC (0.209, 5.30mm Width), it has been packaged. D flip flop is included in the Tape & Reel (TR)package. T flip flop uses Tri-State, Non-Invertedas the output. It is configured with a trigger that uses a value of Positive Edge. Surface Mountmounts this electrical part. Powered by a 2V~3.6Vvolt supply, it operates as follows. It is operating at a temperature of -40°C~85°C TA. D-Typedescribes this flip flop. It is a type of FPGA belonging to the 74LVX series. It should not exceed 95MHzin terms of its output frequency. D latch consists of 1 elements. It consumes 4μA of quiescent This JK flip flop has a 4pFfarad input capacitance.

74LVX374SJX Features


Tape & Reel (TR) package
74LVX series

74LVX374SJX Applications


There are a lot of Rochester Electronics, LLC 74LVX374SJX Flip Flops applications.

  • Computing
  • Shift Registers
  • Test & Measurement
  • Storage registers
  • Functionally equivalent to the MC10/100EL29
  • Buffer registers
  • Latch-up performance
  • High Performance Logic for test systems
  • Shift registers
  • Storage Registers

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