NC7SZ374P6 Overview

The package is in the form of 6-TSSOP, SC-88, SOT-363. D flip flop is embedded in the Tape & Reel (TR) package. There is a Tri-State, Non-Invertedoutput configured with it. The trigger configured with it uses Positive Edge. There is an electronic component mounted in the way of Surface Mount. A voltage of 1.65V~5.5Vis required for its operation. It is at -40°C~85°C TAdegrees Celsius that the system is operating. This logic flip flop is classified as type D-Type. JK flip flop is a part of the 7SZseries of FPGAs. You should not exceed 175MHzin its output frequency. A total of 1elements are present in it. There is a consumption of 1μAof quiescent energy. A total of 6 terminations have been made. A voltage of 1.8V is used as the power supply for this D latch. A JK flip flop with a 3pFfarad input capacitance is used here. LVC/LCX/Zis the family of this D flip flop. It is designed with a number of bits of 1. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). This flip flop has a total of 2ports.

NC7SZ374P6 Features

Tape & Reel (TR) package
7SZ series
1 Bits

NC7SZ374P6 Applications

There are a lot of Rochester Electronics, LLC NC7SZ374P6 Flip Flops applications.

• QML qualified product
• ESCC
• Communications
• Automotive
• ATE
• Set-reset capability
• Latch-up performance
• Count Modes
• Reduced system switching noise
• Individual Asynchronous Resets