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SN74AUC1G79YZPR

SN74AUC1G79YZPR

SN74AUC1G79YZPR

Rochester Electronics, LLC

0.8V~2.7V 275MHz D-Type Flip Flop 10μA 74AUC Series 5-XFBGA, DSBGA

SOT-23

SN74AUC1G79YZPR Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Mounting Type Surface Mount
Package / Case 5-XFBGA, DSBGA
Supplier Device Package 5-DSBGA, 5-WCSP (1.4x0.9)
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74AUC
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Type D-Type
Voltage - Supply 0.8V~2.7V
Function Standard
Output Type Non-Inverted
Number of Elements 1
Clock Frequency 275MHz
Current - Quiescent (Iq) 10μA
Current - Output High, Low 9mA 9mA
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 1.8ns @ 2.5V, 30pF
Trigger Type Positive Edge
Input Capacitance 2.5pF
RoHS Status ROHS3 Compliant
Pricing & Ordering
Quantity Unit Price Ext. Price
1 $0.14000 $0.14
500 $0.1386 $69.3
1000 $0.1372 $137.2
1500 $0.1358 $203.7
2000 $0.1344 $268.8
2500 $0.133 $332.5
SN74AUC1G79YZPR Product Details

SN74AUC1G79YZPR Overview


As a result, it is packaged as 5-XFBGA, DSBGA. A package named Tape & Reel (TR)includes it. It is configured with Non-Invertedas an output. It is configured with the trigger Positive Edge. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 0.8V~2.7V volts. It is at -40°C~85°C TAdegrees Celsius that the system is operating. A flip flop of this type is classified as a D-Type. This type of FPGA is a part of the 74AUC series. You should not exceed 275MHzin the output frequency of the device. D latch consists of 1 elements. During its operation, it consumes 10μA quiescent energy. Input capacitance of this device is 2.5pF farads.

SN74AUC1G79YZPR Features


Tape & Reel (TR) package
74AUC series

SN74AUC1G79YZPR Applications


There are a lot of Rochester Electronics, LLC SN74AUC1G79YZPR Flip Flops applications.

  • Asynchronous counter
  • Test & Measurement
  • Data transfer
  • Memory
  • Registers
  • Modulo – n – counter
  • Bus hold
  • Balanced Propagation Delays
  • Frequency division
  • ATE

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