STD12NM50ND datasheet pdf and Transistors - FETs, MOSFETs - Single product details from STMicroelectronics stock available on our website
SOT-23
STD12NM50ND Datasheet
non-compliant
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Specifications
Name
Value
Type
Parameter
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
TO-252-3, DPak (2 Leads + Tab), SC-63
Number of Pins
3
Transistor Element Material
SILICON
Operating Temperature
150°C TJ
Packaging
Tape & Reel (TR)
Series
FDmesh™ II
JESD-609 Code
e3
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
2
ECCN Code
EAR99
Terminal Finish
Matte Tin (Sn) - annealed
Subcategory
FET General Purpose Power
Technology
MOSFET (Metal Oxide)
Terminal Position
SINGLE
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
260
[email protected] Reflow Temperature-Max (s)
30
Base Part Number
STD12
Pin Count
3
JESD-30 Code
R-PSSO-G2
Number of Elements
1
Configuration
SINGLE
Power Dissipation-Max
100W Tc
Operating Mode
ENHANCEMENT MODE
Power Dissipation
100W
Case Connection
DRAIN
Turn On Delay Time
12 ns
FET Type
N-Channel
Transistor Application
SWITCHING
Rds On (Max) @ Id, Vgs
380m Ω @ 5.5A, 10V
Vgs(th) (Max) @ Id
5V @ 250μA
Input Capacitance (Ciss) (Max) @ Vds
850pF @ 50V
Current - Continuous Drain (Id) @ 25°C
11A Tc
Gate Charge (Qg) (Max) @ Vgs
30nC @ 10V
Rise Time
15ns
Drain to Source Voltage (Vdss)
500V
Drive Voltage (Max Rds On,Min Rds On)
10V
Vgs (Max)
±25V
Fall Time (Typ)
17 ns
Turn-Off Delay Time
40 ns
Continuous Drain Current (ID)
11A
JEDEC-95 Code
TO-252AA
Gate to Source Voltage (Vgs)
25V
Pulsed Drain Current-Max (IDM)
44A
DS Breakdown Voltage-Min
500V
Radiation Hardening
No
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
STD12NM50ND Product Details
Description
The STD12NM50ND is a D2PAK, DPAK, TO-220FP N-channel 500 V, 0.29, 11 A, FDmeshTM II Power MOSFET (with fast diode). The MDmeshTM properties are combined with an intrinsic fast-recovery body diode in the FDmeshTM technology. The end solution has lower on-resistance and faster switching commutations, making it ideal for bridge topologies with low trr requirements.
Features
● 100% avalanche tested
● Low gate charge and input capacitance
● Low input gate resistance
● provide greater efficiency while operating at lower voltages