Internal multispeed low-power 65 kHz to 4.2 MHz RC
PLL for CPU clock
Pre-programmed bootloader
USART, SPI supported
Development support
Serial wire debug supported
Up to 51 fast I/Os (45 I/Os 5V tolerant)
Memories
Up to 64 KB Flash with ECC
8 KB RAM
2 KB of data EEPROM with ECC
20-byte backup register
Sector protection against R/W operation
Rich Analog peripherals (down to 1.8 V)
12-bit ADC 1.14 Msps up to 16 channels (down to 1.65 V)
2x ultra-low-power comparators (window mode and wake-up capability, down to 1.8 V)
7-channel DMA controller, supporting ADC, SPI, I2C, USART, Timers
7x peripherals communication interface
2x USART (ISO 7816, IrDA) 1x UART (low power)
2x SPI 16 Mbits/s
2x I2C (SMBus/PMBus)
9x timers: 1x 16-bit with up to 4 channels, 2x 16-bit with up to 2 channels, 1x 16-bit ultra-low-power timer, 1x SysTick, 1x RTC, 1x 16-bit basic, and 2x watchdogs (independent/window)
CRC calculation unit, 96-bit unique ID
All packages are ECOPACK?2
Ultra-low-power platform
1.65 V to 3.6 V power supply
-40 to 125 °C temperature range
0.27 μA Standby mode (2 wakeup pins)
0.4 μA Stop mode (16 wakeup lines)
0.8 μA Stop mode + RTC + 8 KB RAM retention
139 μA/MHz Run mode at 32 MHz
3.5 μs wakeup time (from RAM)
5 μs wakeup time (from Flash)
Core: ARM? 32-bit Cortex?-M0+ with MPU
From 32 kHz up to 32 MHz max.
0.95 DMIPS/MHz
Ultra-safe, low-power BOR (brownout reset) with 5 selectable thresholds
Ultralow power POR/PDR
Programmable voltage detector (PVD)
Clock sources
1 to 25 MHz crystal oscillator
32 kHz oscillator for RTC with calibration
High-speed internal 16 MHz factory-trimmed RC (+/- 1%)
Internal low-power 37 kHz RC
