It is packaged in the way of 14-TSSOP (0.173, 4.40mm Width). A package named Tubeincludes it. In the configuration, Differentialis used as the output. This trigger is configured to use Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates at 3V~18Vvolts. A temperature of -55°C~125°C TAis used in the operation. It is an electronic flip flop with the type D-Type. The FPGA belongs to the 4000B series. This D flip flop should not have a frequency greater than 24MHz. As a result, it consumes 4μA quiescent current and is not affected by external forces. 14terminations have occurred. It is a member of the CD4013 family. An input voltage of 5Vpowers the D latch. JK flip flop input capacitance is 5pF farads. There is an electronic part that is mounted in the way of Surface Mount. This board has 14 pins. There is a clock edge trigger type of Positive Edgeon this device. There is a FF/Latchesbase part number assigned to the RS flip flops. Normally, the supply voltage (Vsup) should be above 3V. 2 circuits are used to achieve its superior flexibility. With an output current of 6.8mA, this device offers maximum design flexibility. The JK flip flop is with 1 output lines to operate. There is a consumption of 20μAof quiescent current from it.
CD4013BPW Features
Tube package 4000B series 14 pins
CD4013BPW Applications
There are a lot of Texas Instruments CD4013BPW Flip Flops applications.