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XC17S100APD8C

XC17S100APD8C

XC17S100APD8C

Xilinx Inc.

Through Hole Tube Configuration Proms for FPGAs Not Applicable OTP Obsolete XC17S100A

SOT-23

XC17S100APD8C Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Mounting Type Through Hole
Package / Case 8-DIP (0.300, 7.62mm)
Surface Mount NO
Number of Pins 8
Operating Temperature 0°C~70°C
Packaging Tube
Published 1999
JESD-609 Code e0
Pbfree Code no
Part Status Obsolete
Moisture Sensitivity Level (MSL) Not Applicable
Number of Terminations 8
ECCN Code EAR99
Technology CMOS
Voltage - Supply 3V~3.6V
Terminal Position DUAL
Peak Reflow Temperature (Cel) 225
Number of Functions 1
Supply Voltage 3.3V
Terminal Pitch 2.54mm
[email protected] Reflow Temperature-Max (s) 30
Base Part Number XC17S100A
Pin Count 8
Operating Supply Voltage 3.3V
Supply Voltage-Max (Vsup) 3.6V
Supply Voltage-Min (Vsup) 3V
Programmable Type OTP
Supply Current-Max 0.015mA
Output Characteristics 3-STATE
Memory Width 1
Density 1 Mb
Standby Current-Max 0.001A
Parallel/Serial SERIAL
I/O Type COMMON
Memory IC Type CONFIGURATION MEMORY
Height Seated (Max) 4.5974mm
Length 9.3599mm
Width 7.62mm
Radiation Hardening No
RoHS Status Non-RoHS Compliant
Lead Free Contains Lead
XC17S100APD8C Product Details

XC17S100APD8C Description


XC17S100APD8C developed by Xilinx Inc. is a type of OTP configuration PROM specifically designed to provide an easy-to-use, cost-effective method for storing Spartan-II/Spartan-IIE device configuration bitstreams. It is able to generate a configuration clock ro drive the Spartan PROM when the Spartan device operates in Master Serial mode. Based on the low-power CMOS floating gate process, it delivers high performance and strong reliability.



XC17S100APD8C Features


Low-power CMOS floating gate process

3.3V PROM

Simple interface to the Spartan device

Programmable reset polarity

Configuration one-time programmable (OTP) read-only memory



XC17S100APD8C Applications


Electronic game consoles

Electronic dictionaries


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