1V V FPGAs Kintex?-7 Series 484-BBGA, FCBGA 1mm mm 484
SOT-23
XC7K160T-2FB484I Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
13 Weeks
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
484-BBGA, FCBGA
Operating Temperature
-40°C~100°C TJ
Packaging
Tray
Published
2010
Series
Kintex®-7
JESD-609 Code
e0
Part Status
Active
Moisture Sensitivity Level (MSL)
4 (72 Hours)
Number of Terminations
484
Terminal Finish
Tin/Lead (Sn63Pb37)
Subcategory
Field Programmable Gate Arrays
Technology
CMOS
Voltage - Supply
0.97V~1.03V
Terminal Position
BOTTOM
Terminal Form
BALL
Terminal Pitch
1mm
Base Part Number
XC7K160
JESD-30 Code
S-PBGA-B484
Number of Outputs
285
Operating Supply Voltage
1V
Power Supplies
11.83.3V
Number of I/O
285
RAM Size
1.4MB
Clock Frequency
1818MHz
Propagation Delay
100 ps
Number of Inputs
285
Programmable Logic Type
FIELD PROGRAMMABLE GATE ARRAY
Number of Logic Elements/Cells
162240
Total RAM Bits
11980800
Number of LABs/CLBs
12675
Speed Grade
2
Number of Registers
202800
Radiation Hardening
No
RoHS Status
Non-RoHS Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$390.00000
$390
XC7K160T-2FB484I Product Details
XC7K160T-2FB484I Description
XC7K160T-2FB484I is a member of 7 Series FPGAs. Xilinx® 7 series FPGAs comprise four FPGA families that address the complete range of system requirements, ranging from low cost, small form factor, cost-sensitive, high-volume applications to ultra high-end connectivity bandwidth, logic capacity, and signal processing capability for the most demanding high-performance applications. XC7K160T-2FB484I is optimized for best price-performance with a 2X improvement compared to previous generation, enabling a new class of FPGAs.
XC7K160T-2FB484I Features
Advanced high-performance FPGA logic based on real 6-input lookup table (LUT) technology configurable as distributed memory. 36 Kb dual-port block RAM with built-in FIFO logic for on-chip data buffering. High-performance SelectIO™ technology with support for DDR3 interfaces up to 1,866 Mb/s. High-speed serial connectivity with built-in multi-gigabit transceivers from 600 Mb/s to max. rates of 6.6 Gb/s up to 28.05 Gb/s, offering a special low-power mode, optimized for chip-to-chip interfaces. A user configurable analog interface (XADC), incorporating dual 12-bit 1MSPS analog-to-digital converters with on-chip thermal and supply sensors. DSP slices with 25 x 18 multiplier, 48-bit accumulator, and pre-adder for high-performance filtering, including optimized symmetric coefficient filtering.