Why SmartNICs Require Precision Timing in High-Traffic Server Environments
In recent years, SmartNICs, also known as smart network interface cards, have transformed networking and data center applications by combining the connectivity of a traditional network interface card with additional processing capabilities. SmartNICs maximize the efficiency in high-traffic servers by offloading some of the repetitive packet processing tasks from the core CPU. The SmartNICs that drive crucial applications, such as data centers and 5G networks, require precise timing for stable synchronization, increased data throughput and reduced latency.
SmartNICs in Packet-Based Synchronous Systems
One critical requirement for many SmartNIC applications is the implementation of IEEE 1588 precision time protocol (PTP). Through precise synchronization, PTP enables technologies vital to our datacenters and networks such as parallel computing, artificial intelligence (AI) and high-bandwidth 5G radios. While PTP is crucial to many SmartNICs, it’s highly sensitive to the dynamic thermal changes common in datacenters and outdoor networking equipment. SiTime Elite Platform Super-TCXOs and Epoch Platform OCXOs are specifically designed to meet the stringent requirements of IEEE 1588, offering robust environmental performance and excellent temperature slope characteristics.
These features enable the timing solutions to maintain timing accuracy, even in rapidly changing temperature conditions. For example, when a fan turns on and the temperature changes quickly, the reference oscillator must maintain a stable frequency until a new PTP packet with a suitable time stamp arrives, ensuring continuous synchronization. In contrast to quartz-based devices, SiTime Super-TCXOs and OCXOs leverage a DualMEMS® architecture that delivers leading frequency over temperature slope (dF/dT) between ±1 and ±0.01 ppb/°C, making them uniquely stable in harsh real-world environments.
A Super-TCXO or an OCXO provides a stable frequency to the network synchronizer in a IEEE 1588-enabled SmartNIC, as shown in this simplified block diagram.
Some SmartNICs, including those used for financial trading and in 5G open radio access network distributed units (O-RAN DU), require not only high stability over temperature, but very low aging and wander for time holdover. These applications usually require the oscillator to operate without a time reference, such as PTP, for 2 to 12 hours without exceeding 1.5 µS of accumulated time error. To meet and even exceed these holdover requirements, SiTime’s MEMS-based Super-TCXOs and OCXOs deliver up to 12 hours of holdover in real-world conditions.
Holdover test of ±1-ppb Epoch Platform MEMS OCXOs and comparable ±1-ppb quartz OCXOs from one of the largest quartz vendors. Tested during an 8°C temperature cycle and breezy airflow up to 1 meter per second, to induce rapid temperature change. The Epoch Platform MEMS OCXO delivers 2X less time error after 8 hours.
SmartNICs in High-Speed Data Systems
While some SmartNICs are optimized for packet-based synchronization, others are designed for high-speed SERDES and fast data rates. For SmartNICs optimized for data rates ranging from 100 to 800 Gbps, low jitter becomes a critical performance parameter. In such scenarios, SiTime's SiT9501 differential oscillator emerges as the ideal solution, offering ultra-low jitter and exceptional power supply noise reduction for Ethernet SoCs. In a small 2016 package, the small form factor of the SiT9501 makes it well-suited for dense boards, while its precise timing capabilities and ultra-low jitter, meet the stringent requirements of 100 to 800G Ethernet clocking applications.
A SiT9501 or SiT9375 differential oscillator provides the reference clock in a SmartNIC used in high-speed data applications, as shown in this simplified block diagram.
The SiT9501 offers 70 fs RMS phase jitter, inclusive of spurs in phase noise. Spurs can be a major contributor to jitter. Many phase-locked-loop-based (PLL-based) oscillators can generate large spurs and as a result, generate jitter greater than 200 fs even though the datasheet specification may be lower than 100 fs. With the unique PLL technology of the SiT9501, spurs are completely eliminated, ensuring a total of 70 fs of jitter to deliver the best margin when designing systems.
For SmartNICs on today’s cutting edge, SiTime Super-TCXOs can be used when both synchronization and high-speed SERDES are required, but space constraints limit the use of a network synchronizer. SiTime Super-TCXOs deliver best-in-class stability over temperature slope and RMS phase jitter as low as 100 fs. In addition, the output frequency can be digitally steered with 50 ppt resolution for the most demanding PTP requirements.
SiT9501 differential oscillator phase noise plot demonstrating 70.629 fsec of RMS phase jitter and no spurs.
SmartNIC Timing Solutions
SmartNICs have become indispensable components in modern networking and data center environments, enabling core CPUs to focus on complex tasks while expanding server computational capabilities. SiTime's range of environmentally robust timing solutions, tailored for SmartNIC applications, meets the needs of today's demanding datacenter and networking landscapes. By leveraging SiTime's cutting-edge timing technologies, designers can unlock the full potential of their SmartNIC deployments and ensure seamless synchronization and operation in diverse conditions.
