Through Hole 512kb Mb Tube Configuration Proms for FPGAs 1 (Unlimited) Serial EEPROM Obsolete AT17N512
SOT-23
AT17N512-10PI Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Mounting Type
Through Hole
Package / Case
8-DIP (0.300, 7.62mm)
Number of Pins
8
Supplier Device Package
8-PDIP
Operating Temperature
-40°C~85°C
Packaging
Tube
Published
1997
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Max Operating Temperature
85°C
Min Operating Temperature
-40°C
Voltage - Supply
3V~3.6V
Frequency
10MHz
Base Part Number
AT17N512
Programmable Type
Serial EEPROM
Max Supply Voltage
3.6V
Min Supply Voltage
3V
Memory Size
512kb
Nominal Supply Current
5mA
RoHS Status
Non-RoHS Compliant
Lead Free
Contains Lead
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$4.82000
$4.82
500
$4.7718
$2385.9
1000
$4.7236
$4723.6
1500
$4.6754
$7013.1
2000
$4.6272
$9254.4
2500
$4.579
$11447.5
AT17N512-10PI Product Details
AT17N512-10PI Overview
This package makes use of the 8-DIP (0.300, 7.62mm) programming language.Packaging for the external use of Tube.Qualified to operate within -40°C~85°C.This device can be programmed using the Serial EEPROM language.FPGA is fed wFPGAh a voltage of 3V~3.6V.Through Hole is the mounting position of this memory device.There is a limit of 512kb MB for the amount of data that can be stored.AT17N512 will give you other related parts.A 8 pin is included in it.FPGA is 8-PDIP that is the supplier's device package of this part.There is a frequency of 10MHz that is used by the switching controller.As low as -40°C is the lowest temperature at which it can operate.Ideally, it should be operated with an ambient temperature no higher than 85°C at all times.At least 3V should be the voltage used to run it.In terms of the maximum voltage supply, it is rated with a 3.6V rating.
AT17N512-10PI Features
Operating temperature: -40°C~85°C. Serial EEPROM program capability. Frequency: 10MHz.
AT17N512-10PI Applications
There are a lot of Microchip Technology AT17N512-10PI applications of configuration proms for FPGAs.