-3V~-5.5V 3GHz 1 Bit D-Type Flip Flop DUAL 10EP53 10 Pins 10EP Series 10-TFSOP, 10-MSOP (0.118, 3.00mm Width)
SOT-23
SY10EP53VKG-TR Datasheet
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Specifications
Name
Value
Type
Parameter
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
10-TFSOP, 10-MSOP (0.118, 3.00mm Width)
Number of Pins
10
Operating Temperature
-40°C~85°C TA
Packaging
Tape & Reel (TR)
Published
2008
Series
10EP
JESD-609 Code
e4
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
10
Type
D-Type
Terminal Finish
Nickel/Palladium/Gold (Ni/Pd/Au)
Additional Feature
NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V
Technology
ECL
Voltage - Supply
-3V~-5.5V
Terminal Position
DUAL
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
260
Supply Voltage
3.3V
Terminal Pitch
0.5mm
[email protected] Reflow Temperature-Max (s)
40
Base Part Number
10EP53
Function
Set(Preset) and Reset
Qualification Status
Not Qualified
Output Type
Differential
Number of Elements
1
Polarity
Non-Inverting
Supply Voltage-Max (Vsup)
5.5V
Supply Voltage-Min (Vsup)
3V
Number of Bits
1
Clock Frequency
3GHz
Propagation Delay
475 ps
Quiescent Current
47mA
Turn On Delay Time
275 ps
Family
10E
Logic Function
AND
Trigger Type
Positive, Negative
High Level Output Current
-50mA
Low Level Output Current
50mA
Clock Edge Trigger Type
Positive Edge
Length
3mm
Width
3mm
RoHS Status
ROHS3 Compliant
SY10EP53VKG-TR Product Details
SY10EP53VKG-TR Overview
In the form of 10-TFSOP, 10-MSOP (0.118, 3.00mm Width), it has been packaged. Package Tape & Reel (TR)embeds it. T flip flop uses Differentialas its output configuration. This trigger uses the value Positive, Negative. Surface Mountmounts this electrical part. A voltage of -3V~-5.5Vis required for its operation. In the operating environment, the temperature is -40°C~85°C TA. D-Typedescribes this flip flop. JK flip flop belongs to the 10EPseries of FPGAs. A frequency of 3GHzshould be the maximum output frequency. In total, it contains 1 elements. There have been 10 terminations. D latch belongs to the 10EP53 family. The D flip flop is powered by a voltage of 3.3V . In this case, the D flip flop belongs to the 10Efamily. There is an electronic component mounted in the way of Surface Mount. 10pins are included in its design. This device has Positive Edgeas its clock edge trigger type. It is designed with a number of bits of 1. Vsup reaches its maximum value at 5.5V. Normally, the supply voltage (Vsup) should be above 3V. There is 47mA quiescent current consumption by it. It is also characterized by NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V. In this case, the high level output current is set to -50mA. Low level output current is set to 50mA.