0.8V~3.6V 309MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G80 6 Pins 74AUP Series 6-XFDFN
SOT-23
74AUP1G80GF,132 Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
20 Weeks
Contact Plating
Tin
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
6-XFDFN
Number of Pins
6
Operating Temperature
-40°C~125°C TA
Packaging
Tape & Reel (TR)
Series
74AUP
JESD-609 Code
e3
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
6
Type
D-Type
Technology
CMOS
Voltage - Supply
0.8V~3.6V
Terminal Position
DUAL
Peak Reflow Temperature (Cel)
260
Supply Voltage
1.2V
Terminal Pitch
0.35mm
[email protected] Reflow Temperature-Max (s)
40
Base Part Number
74AUP1G80
Function
Standard
Output Type
Inverted
Polarity
Inverting
Supply Voltage-Min (Vsup)
0.8V
Number of Bits
1
Clock Frequency
309MHz
Propagation Delay
20.7 ns
Quiescent Current
500nA
Turn On Delay Time
2.2 ns
Family
AUP/ULP/V
Current - Output High, Low
4mA 4mA
Max Propagation Delay @ V, Max CL
6.4ns @ 3.3V, 30pF
Trigger Type
Positive Edge
Input Capacitance
1.5pF
Number of Input Lines
1
Clock Edge Trigger Type
Positive Edge
Height Seated (Max)
0.5mm
Radiation Hardening
No
RoHS Status
ROHS3 Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$0.212400
$0.2124
10
$0.200377
$2.00377
100
$0.189035
$18.9035
500
$0.178335
$89.1675
1000
$0.168240
$168.24
74AUP1G80GF,132 Product Details
74AUP1G80GF,132 Overview
6-XFDFNis the way it is packaged. The package Tape & Reel (TR)contains it. The output it is configured with uses Inverted. It is configured with a trigger that uses a value of Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A 0.8V~3.6Vsupply voltage is required for it to operate. A temperature of -40°C~125°C TAis considered to be the operating temperature. There is D-Type type of electronic flip flop associated with this device. The 74AUPseries comprises this type of FPGA. You should not exceed 309MHzin the output frequency of the device. The number of terminations is 6. The object belongs to the 74AUP1G80 family. An input voltage of 1.2Vpowers the D latch. Input capacitance of this device is 1.5pF farads. The electronic device belongs to the AUP/ULP/Vfamily. It is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 6. A Positive Edgeclock edge trigger is used in this device. It is designed with a number of bits of 1. A normal operating voltage (Vsup) should remain above 0.8V. As of now, there are 1input lines. In terms of quiescent current, it consumes 500nA .