74AUP1G80GM,132 Overview

The flip flop is packaged in a case of 6-XFDFN. As part of the package Tape & Reel (TR), it is embedded. This output is configured with Inverted. In the configuration of the trigger, Positive Edgeis used. Surface Mountis in the way of this electric part. Powered by a 0.8V~3.6Vvolt supply, it operates as follows. -40°C~125°C TAis the operating temperature. It is an electronic flip flop with the type D-Type. JK flip flop belongs to the 74AUPseries of FPGAs. This D flip flop should not have a frequency greater than 309MHz. There are 6 terminations,This D latch belongs to the family of 74AUP1G80. It is powered by a voltage of 1.2V . A JK flip flop with a 1.5pFfarad input capacitance is used here. In terms of electronic devices, this device belongs to the AUP/ULP/Vfamily of devices. Electronic part Surface Mountis mounted in the way. The electronic flip flop is designed with pins 6. This device has Positive Edgeas its clock edge trigger type. An electronic part with 1bits has been designed. Normally, the supply voltage (Vsup) should be above 0.8V. To achieve this superior flexibility, 1 circuits are used. In terms of quiescent current, it consumes 500nA .

74AUP1G80GM,132 Features

Tape & Reel (TR) package
74AUP series
6 pins
1 Bits

74AUP1G80GM,132 Applications

There are a lot of Nexperia USA Inc. 74AUP1G80GM,132 Flip Flops applications.

• Communications
• ESD performance
• Latch-up performance
• Buffered Clock
• Frequency Dividers
• ESD protection
• Frequency division
• Clock pulse
• Guaranteed simultaneous switching noise level
• Memory